u-boot/arch/riscv/cpu/ax25
Leo Yu-Chi Liang 1b2b52f294 riscv: ae350: enable Coherence Manager for ae350
If Coherence Manager were not set in the beginning,
u-boot-spl would sometimes fail to boot to u-boot proper.

Enable CM and I/D cache at the same time in harts_early_init

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-10-07 16:08:23 +08:00
..
cache.c common: Drop net.h from common header 2020-05-18 17:33:31 -04:00
cpu.c riscv: ae350: enable Coherence Manager for ae350 2021-10-07 16:08:23 +08:00
Kconfig cpu: Rename SPL_CPU_SUPPORT to SPL_CPU 2021-03-27 15:04:31 +13:00
Makefile riscv: cache: Implement i/dcache [status, enable, disable] 2018-11-26 13:58:01 +08:00