mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-26 13:03:40 +00:00
0d331c035a
Add i.MX8QM MEK board support. Included a basic dts, enabled SPL FIT Boot log as below: U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800) Normal Boot Trying to boot from MMC2_2 U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800) CPU: NXP i.MX8QM RevB A53 at 142933 MHz Model: Freescale i.MX8QM MEK Board: iMX8QM MEK Build: SCFW 9330215b Boot: SD1 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: Error: ethernet@5b040000 address not set. eth-1: ethernet@5b040000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
157 lines
3 KiB
C
157 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 NXP
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*/
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#include <common.h>
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#include <errno.h>
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#include <linux/libfdt.h>
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#include <environment.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sci/sci.h>
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#include <asm/arch/imx8-pins.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
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(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
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(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
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(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
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static iomux_cfg_t uart0_pads[] = {
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SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
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}
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int board_early_init_f(void)
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{
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int ret;
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/* Set UART0 clock root to 80 MHz */
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sc_pm_clock_rate_t rate = 80000000;
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/* Power up UART0 */
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ret = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON);
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if (ret)
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return ret;
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ret = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, &rate);
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if (ret)
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return ret;
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/* Enable UART0 clock root */
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ret = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false);
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if (ret)
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return ret;
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setup_iomux_uart();
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sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
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return 0;
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}
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#if IS_ENABLED(CONFIG_DM_GPIO)
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static void board_gpio_init(void)
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{
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/* TODO */
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}
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#else
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static inline void board_gpio_init(void) {}
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#endif
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#if IS_ENABLED(CONFIG_FEC_MXC)
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#include <miiphy.h>
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int board_phy_config(struct phy_device *phydev)
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{
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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#endif
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void build_info(void)
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{
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u32 sc_build = 0, sc_commit = 0;
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/* Get SCFW build and commit id */
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sc_misc_build_info(-1, &sc_build, &sc_commit);
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if (!sc_build) {
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printf("SCFW does not support build info\n");
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sc_commit = 0; /* Display 0 when the build info is not supported*/
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}
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printf("Build: SCFW %x\n", sc_commit);
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}
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int checkboard(void)
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{
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puts("Board: iMX8QM MEK\n");
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build_info();
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print_bootinfo();
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return 0;
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}
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int board_init(void)
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{
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/* Power up base board */
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sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
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board_gpio_init();
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return 0;
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}
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void detail_board_ddr_info(void)
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{
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puts("\nDDR ");
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}
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/*
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* Board specific reset that is system reset.
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*/
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void reset_cpu(ulong addr)
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{
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/* TODO */
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}
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *blob, bd_t *bd)
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{
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return 0;
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}
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#endif
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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int board_late_init(void)
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{
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#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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env_set("board_name", "MEK");
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env_set("board_rev", "iMX8QM");
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#endif
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return 0;
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}
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