mirror of
https://github.com/AsahiLinux/u-boot
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8b3d7ecdfe
Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse is used for secure boot and each line is 64 bits long + 1 lock bit. LD eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot already contains HD eFuse reading and programming support. This patch implements LD eFuse reading support. LD 0 line is mapped to U-Boot fuse bank 64 and LD 1 line to fuse bank 65. LD 0 Marvell Internal Use line seems that was burned in factory with some data and can be read by U-Boot fuse command: => fuse read 64 0 9 LD 1 General Purpose Data line is by default empty and can be read by U-Boot fuse command: => fuse read 65 0 9 Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz>
293 lines
5.7 KiB
C
293 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015-2016 Reinhard Pfau <reinhard.pfau@gdsys.cc>
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*/
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#include <config.h>
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#include <common.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/efuse.h>
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#include <asm/arch/soc.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/mbus.h>
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#if defined(CONFIG_MVEBU_EFUSE_FAKE)
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#define DRY_RUN
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#else
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#undef DRY_RUN
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#endif
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#define MBUS_EFUSE_BASE 0xF6000000
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#define MBUS_EFUSE_SIZE BIT(20)
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#define MVEBU_EFUSE_CONTROL (MVEBU_REGISTER(0xE4008))
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enum {
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MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31),
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MVEBU_EFUSE_LD1_SELECT = (1 << 6),
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};
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struct mvebu_hd_efuse {
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u32 bits_31_0;
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u32 bits_63_32;
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u32 bit64;
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u32 reserved0;
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};
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#ifndef DRY_RUN
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static struct mvebu_hd_efuse *efuses =
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(struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000);
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static u32 *ld_efuses = (void *)MBUS_EFUSE_BASE + 0xF8F00;
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#else
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static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1];
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static u32 ld_efuses[EFUSE_LD_WORDS];
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#endif
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static int efuse_initialised;
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static struct mvebu_hd_efuse *get_efuse_line(int nr)
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{
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if (nr < 0 || nr > 63 || !efuse_initialised)
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return NULL;
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return efuses + nr;
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}
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static void enable_efuse_program(void)
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{
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#ifndef DRY_RUN
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setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
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#endif
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}
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static void disable_efuse_program(void)
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{
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#ifndef DRY_RUN
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clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
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#endif
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}
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static int do_prog_efuse(struct mvebu_hd_efuse *efuse,
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struct efuse_val *new_val, u32 mask0, u32 mask1)
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{
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struct efuse_val val;
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val.dwords.d[0] = readl(&efuse->bits_31_0);
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val.dwords.d[1] = readl(&efuse->bits_63_32);
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val.lock = readl(&efuse->bit64);
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if (val.lock & 1)
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return -EPERM;
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val.dwords.d[0] |= (new_val->dwords.d[0] & mask0);
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val.dwords.d[1] |= (new_val->dwords.d[1] & mask1);
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val.lock |= new_val->lock;
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writel(val.dwords.d[0], &efuse->bits_31_0);
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mdelay(1);
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writel(val.dwords.d[1], &efuse->bits_63_32);
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mdelay(1);
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writel(val.lock, &efuse->bit64);
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mdelay(5);
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return 0;
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}
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static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
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{
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struct mvebu_hd_efuse *efuse;
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int res = 0;
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res = mvebu_efuse_init_hw();
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if (res)
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return res;
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efuse = get_efuse_line(nr);
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if (!efuse)
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return -ENODEV;
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if (!new_val)
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return -EINVAL;
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/* only write a fuse line with lock bit */
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if (!new_val->lock)
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return -EINVAL;
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/* according to specs ECC protection bits must be 0 on write */
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if (new_val->bytes.d[7] & 0xFE)
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return -EINVAL;
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if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
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return 0;
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enable_efuse_program();
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res = do_prog_efuse(efuse, new_val, mask0, mask1);
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disable_efuse_program();
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return res;
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}
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int mvebu_efuse_init_hw(void)
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{
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int ret;
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if (efuse_initialised)
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return 0;
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ret = mvebu_mbus_add_window_by_id(
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CPU_TARGET_SATA23_DFX, 0xA, MBUS_EFUSE_BASE, MBUS_EFUSE_SIZE);
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if (ret)
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return ret;
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efuse_initialised = 1;
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return 0;
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}
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int mvebu_read_efuse(int nr, struct efuse_val *val)
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{
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struct mvebu_hd_efuse *efuse;
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int res;
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res = mvebu_efuse_init_hw();
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if (res)
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return res;
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efuse = get_efuse_line(nr);
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if (!efuse)
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return -ENODEV;
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if (!val)
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return -EINVAL;
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val->dwords.d[0] = readl(&efuse->bits_31_0);
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val->dwords.d[1] = readl(&efuse->bits_63_32);
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val->lock = readl(&efuse->bit64);
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return 0;
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}
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void mvebu_read_ld_efuse(int ld1, u32 *line)
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{
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int i;
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#ifndef DRY_RUN
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if (ld1)
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setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_LD1_SELECT);
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else
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clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_LD1_SELECT);
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#endif
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for (i = 0; i < EFUSE_LD_WORDS; i++)
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line[i] = readl(ld_efuses + i);
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}
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int mvebu_write_efuse(int nr, struct efuse_val *val)
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{
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return prog_efuse(nr, val, ~0, ~0);
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}
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int mvebu_lock_efuse(int nr)
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{
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struct efuse_val val = {
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.lock = 1,
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};
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return prog_efuse(nr, &val, 0, 0);
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}
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/*
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* wrapper funcs providing the fuse API
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*
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* we use the following mapping:
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* "bank" -> eFuse line
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* "word" -> 0: bits 0-31
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* 1: bits 32-63
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* 2: bit 64 (lock)
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*/
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static struct efuse_val prog_val;
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static int valid_prog_words;
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int fuse_read(u32 bank, u32 word, u32 *val)
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{
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struct efuse_val fuse_line;
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u32 ld_line[EFUSE_LD_WORDS];
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int res;
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if ((bank == EFUSE_LD0_LINE || bank == EFUSE_LD1_LINE) && word < EFUSE_LD_WORDS) {
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res = mvebu_efuse_init_hw();
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if (res)
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return res;
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mvebu_read_ld_efuse(bank == EFUSE_LD1_LINE, ld_line);
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*val = ld_line[word];
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return 0;
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}
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if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
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return -EINVAL;
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res = mvebu_read_efuse(bank, &fuse_line);
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if (res)
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return res;
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if (word < 2)
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*val = fuse_line.dwords.d[word];
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else
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*val = fuse_line.lock;
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return res;
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}
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int fuse_sense(u32 bank, u32 word, u32 *val)
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{
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/* not supported */
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return -ENOSYS;
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}
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int fuse_prog(u32 bank, u32 word, u32 val)
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{
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int res = 0;
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/*
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* NOTE: Fuse line should be written as whole.
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* So how can we do that with this API?
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* For now: remember values for word == 0 and word == 1 and write the
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* whole line when word == 2.
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* This implies that we always require all 3 fuse prog cmds (one for
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* for each word) to write a single fuse line.
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* Exception is a single write to word 2 which will lock the fuse line.
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*
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* Hope that will be OK.
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*/
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if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
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return -EINVAL;
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if (word < 2) {
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prog_val.dwords.d[word] = val;
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valid_prog_words |= (1 << word);
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} else if ((valid_prog_words & 3) == 0 && val) {
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res = mvebu_lock_efuse(bank);
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valid_prog_words = 0;
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} else if ((valid_prog_words & 3) != 3 || !val) {
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res = -EINVAL;
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} else {
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prog_val.lock = val != 0;
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res = mvebu_write_efuse(bank, &prog_val);
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valid_prog_words = 0;
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}
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return res;
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}
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int fuse_override(u32 bank, u32 word, u32 val)
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{
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/* not supported */
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return -ENOSYS;
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}
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