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b3b60f5912
This feature was dropped from U-Boot some time ago:
f12f96cfaf (sf: Drop spl_flash_get_sw_write_prot")
However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).
I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.
Re the points mentioned in the removal commit:
1) This kind of requirement can be achieved using existing
flash operations and flash locking API calls instead of
making a separate flash API.
Which uclass is this?
2) Technically there is no real hardware user for this API to
use in the source tree.
I do want coral (at least) to support this.
3) Having a flash operations API for simple register read bits
also make difficult to extend the flash operations.
This new patch only mentions write-protect being on or off, rather than
the actual mechanism.
4) Instead of touching generic code, it is possible to have
this functionality inside spinor operations in the form of
flash hooks or fixups for associated flash chips.
That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.
Signed-off-by: Simon Glass <sjg@chromium.org>
109 lines
2.4 KiB
C
109 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2014 Google, Inc
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi_flash.h>
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#include <asm/global_data.h>
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#include <dm/device-internal.h>
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#include "sf_internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf)
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{
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return log_ret(sf_get_ops(dev)->read(dev, offset, len, buf));
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}
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int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
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const void *buf)
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{
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return log_ret(sf_get_ops(dev)->write(dev, offset, len, buf));
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}
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int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)
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{
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return log_ret(sf_get_ops(dev)->erase(dev, offset, len));
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}
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int spl_flash_get_sw_write_prot(struct udevice *dev)
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{
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struct dm_spi_flash_ops *ops = sf_get_ops(dev);
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if (!ops->get_sw_write_prot)
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return -ENOSYS;
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return log_ret(ops->get_sw_write_prot(dev));
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}
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/*
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* TODO(sjg@chromium.org): This is an old-style function. We should remove
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* it when all SPI flash drivers use dm
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*/
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struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode)
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{
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struct udevice *dev;
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if (spi_flash_probe_bus_cs(bus, cs, max_hz, spi_mode, &dev))
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return NULL;
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return dev_get_uclass_priv(dev);
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}
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int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode,
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struct udevice **devp)
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{
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struct spi_slave *slave;
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struct udevice *bus;
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char *str;
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int ret;
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#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(USE_TINY_PRINTF)
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str = "spi_flash";
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#else
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char name[30];
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snprintf(name, sizeof(name), "spi_flash@%d:%d", busnum, cs);
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str = strdup(name);
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#endif
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ret = spi_get_bus_and_cs(busnum, cs, max_hz, spi_mode,
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"jedec_spi_nor", str, &bus, &slave);
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if (ret)
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return ret;
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*devp = slave->dev;
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return 0;
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}
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static int spi_flash_post_bind(struct udevice *dev)
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{
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#if defined(CONFIG_NEEDS_MANUAL_RELOC)
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struct dm_spi_flash_ops *ops = sf_get_ops(dev);
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static int reloc_done;
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if (!reloc_done) {
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if (ops->read)
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ops->read += gd->reloc_off;
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if (ops->write)
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ops->write += gd->reloc_off;
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if (ops->erase)
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ops->erase += gd->reloc_off;
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reloc_done++;
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}
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#endif
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return 0;
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}
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UCLASS_DRIVER(spi_flash) = {
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.id = UCLASS_SPI_FLASH,
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.name = "spi_flash",
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.post_bind = spi_flash_post_bind,
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.per_device_auto = sizeof(struct spi_nor),
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};
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