mirror of
https://github.com/AsahiLinux/u-boot
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0ca4d40cfe
Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date: Fri May 4 21:05:44 2018 +0200
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
Note: bananapi-m3 and cubietruck-plus board dts files has
usb_otg enabled in U-Boot which were not present in Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
140 lines
4.1 KiB
C
140 lines
4.1 KiB
C
/*
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* Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_
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#define _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_
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#define CLK_PLL_PERIPH 6
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#define CLK_PLL_DE 9
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#define CLK_C0CPUX 11
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#define CLK_C1CPUX 12
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#define CLK_BUS_MIPI_DSI 19
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#define CLK_BUS_SS 20
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#define CLK_BUS_DMA 21
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#define CLK_BUS_MMC0 22
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#define CLK_BUS_MMC1 23
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#define CLK_BUS_MMC2 24
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#define CLK_BUS_NAND 25
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#define CLK_BUS_DRAM 26
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#define CLK_BUS_EMAC 27
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#define CLK_BUS_HSTIMER 28
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#define CLK_BUS_SPI0 29
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#define CLK_BUS_SPI1 30
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#define CLK_BUS_OTG 31
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#define CLK_BUS_EHCI0 32
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#define CLK_BUS_EHCI1 33
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#define CLK_BUS_OHCI0 34
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#define CLK_BUS_VE 35
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#define CLK_BUS_TCON0 36
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#define CLK_BUS_TCON1 37
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#define CLK_BUS_CSI 38
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#define CLK_BUS_HDMI 39
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#define CLK_BUS_DE 40
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#define CLK_BUS_GPU 41
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#define CLK_BUS_MSGBOX 42
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#define CLK_BUS_SPINLOCK 43
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#define CLK_BUS_SPDIF 44
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#define CLK_BUS_PIO 45
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#define CLK_BUS_I2S0 46
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#define CLK_BUS_I2S1 47
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#define CLK_BUS_I2S2 48
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#define CLK_BUS_TDM 49
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#define CLK_BUS_I2C0 50
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#define CLK_BUS_I2C1 51
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#define CLK_BUS_I2C2 52
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#define CLK_BUS_UART0 53
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#define CLK_BUS_UART1 54
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#define CLK_BUS_UART2 55
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#define CLK_BUS_UART3 56
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#define CLK_BUS_UART4 57
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#define CLK_NAND 59
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#define CLK_MMC0 60
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#define CLK_MMC0_SAMPLE 61
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#define CLK_MMC0_OUTPUT 62
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#define CLK_MMC1 63
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#define CLK_MMC1_SAMPLE 64
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#define CLK_MMC1_OUTPUT 65
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#define CLK_MMC2 66
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#define CLK_MMC2_SAMPLE 67
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#define CLK_MMC2_OUTPUT 68
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#define CLK_SS 69
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#define CLK_SPI0 70
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#define CLK_SPI1 71
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#define CLK_I2S0 72
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#define CLK_I2S1 73
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#define CLK_I2S2 74
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#define CLK_TDM 75
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#define CLK_SPDIF 76
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#define CLK_USB_PHY0 77
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#define CLK_USB_PHY1 78
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#define CLK_USB_HSIC 79
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#define CLK_USB_HSIC_12M 80
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#define CLK_USB_OHCI0 81
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#define CLK_DRAM_VE 83
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#define CLK_DRAM_CSI 84
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#define CLK_TCON0 85
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#define CLK_TCON1 86
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#define CLK_CSI_MISC 87
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#define CLK_MIPI_CSI 88
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#define CLK_CSI_MCLK 89
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#define CLK_CSI_SCLK 90
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#define CLK_VE 91
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#define CLK_AVS 92
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#define CLK_HDMI 93
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#define CLK_HDMI_SLOW 94
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#define CLK_MIPI_DSI0 96
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#define CLK_MIPI_DSI1 97
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#define CLK_GPU_CORE 98
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#define CLK_GPU_MEMORY 99
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#define CLK_GPU_HYD 100
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#endif /* _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_ */
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