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https://github.com/AsahiLinux/u-boot
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65cc0e2a65
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
101 lines
2.4 KiB
C
101 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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* Aneesh V <aneesh@ti.com>
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*/
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#include <linux/types.h>
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#include <asm/io.h>
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#include <asm/armv7.h>
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#include <asm/pl310.h>
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#include <config.h>
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#include <common.h>
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struct pl310_regs *const pl310 = (struct pl310_regs *)CFG_SYS_PL310_BASE;
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static void pl310_cache_sync(void)
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{
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writel(0, &pl310->pl310_cache_sync);
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}
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static void pl310_background_op_all_ways(u32 *op_reg)
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{
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u32 assoc_16, associativity, way_mask;
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assoc_16 = readl(&pl310->pl310_aux_ctrl) &
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PL310_AUX_CTRL_ASSOCIATIVITY_MASK;
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if (assoc_16)
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associativity = 16;
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else
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associativity = 8;
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way_mask = (1 << associativity) - 1;
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/* Invalidate all ways */
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writel(way_mask, op_reg);
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/* Wait for all ways to be invalidated */
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while (readl(op_reg) & way_mask)
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;
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pl310_cache_sync();
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}
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void v7_outer_cache_inval_all(void)
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{
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pl310_background_op_all_ways(&pl310->pl310_inv_way);
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}
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void v7_outer_cache_flush_all(void)
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{
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pl310_background_op_all_ways(&pl310->pl310_clean_inv_way);
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}
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/* Flush(clean invalidate) memory from start to stop-1 */
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void v7_outer_cache_flush_range(u32 start, u32 stop)
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{
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/* PL310 currently supports only 32 bytes cache line */
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u32 pa, line_size = 32;
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/*
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* Align to the beginning of cache-line - this ensures that
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* the first 5 bits are 0 as required by PL310 TRM
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*/
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start &= ~(line_size - 1);
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for (pa = start; pa < stop; pa = pa + line_size)
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writel(pa, &pl310->pl310_clean_inv_line_pa);
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pl310_cache_sync();
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}
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/* invalidate memory from start to stop-1 */
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void v7_outer_cache_inval_range(u32 start, u32 stop)
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{
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/* PL310 currently supports only 32 bytes cache line */
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u32 pa, line_size = 32;
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/*
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* If start address is not aligned to cache-line do not
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* invalidate the first cache-line
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*/
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if (start & (line_size - 1)) {
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printf("ERROR: %s - start address is not aligned - 0x%08x\n",
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__func__, start);
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/* move to next cache line */
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start = (start + line_size - 1) & ~(line_size - 1);
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}
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/*
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* If stop address is not aligned to cache-line do not
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* invalidate the last cache-line
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*/
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if (stop & (line_size - 1)) {
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printf("ERROR: %s - stop address is not aligned - 0x%08x\n",
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__func__, stop);
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/* align to the beginning of this cache line */
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stop &= ~(line_size - 1);
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}
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for (pa = start; pa < stop; pa = pa + line_size)
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writel(pa, &pl310->pl310_inv_line_pa);
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pl310_cache_sync();
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}
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