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7e589bc19b
Add a GPIO driver which uses the pinctrl driver to access the pad information. This driver relies on the GPIO nodes being subnodes to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
55 lines
1.3 KiB
Text
55 lines
1.3 KiB
Text
Intel Apollo Lake GPIO controller
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The Apollo Lake (APL) GPIO controller is used to control GPIO functions of
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the pins.
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Required properties:
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- compatible: "intel,apl-gpio"
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- #gpio-cells: Should be 2. The syntax of the gpio specifier used by client
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nodes should be the following with values derived from the SoC user manual.
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<[phandle of the gpio controller node]
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[pin number within the gpio controller]
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[flags]>
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Values for gpio specifier:
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- Pin number: is a GPIO pin number between 0 and 244
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- Flags: GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW
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- gpio-controller: Specifies that the node is a gpio controller.
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Example:
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...
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{
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p2sb: p2sb@d,0 {
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reg = <0x02006810 0 0 0 0>;
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compatible = "intel,apl-p2sb";
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early-regs = <IOMAP_P2SB_BAR 0x100000>;
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north {
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compatible = "intel,apl-pinctrl";
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intel,p2sb-port-id = <PID_GPIO_N>;
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gpio_n: gpio-n {
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compatible = "intel,gpio";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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i2c_2: i2c2@16,2 {
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compatible = "intel,apl-i2c", "snps,designware-i2c-pci";
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reg = <0x0200b210 0 0 0 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <400000>;
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tpm@50 {
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reg = <0x50>;
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compatible = "google,cr50";
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u-boot,i2c-offset-len = <0>;
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ready-gpio = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
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};
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};
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};
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...
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