mirror of
https://github.com/AsahiLinux/u-boot
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a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/**
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* (C) Copyright 2014, Cavium Inc.
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**/
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#ifndef __THUNDERX_88XX_H__
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#define __THUNDERX_88XX_H__
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#define CONFIG_REMAKE_ELF
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#define CONFIG_THUNDERX
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#define CONFIG_SYS_64BIT
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#define MEM_BASE 0x00500000
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#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
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/* Link Definitions */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* SMP Spin Table Definitions */
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#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
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#define CONFIG_SYS_MEMTEST_START MEM_BASE
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#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
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/* PL011 Serial Configuration */
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#define CONFIG_PL011_CLOCK 24000000
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/* Generic Interrupt Controller Definitions */
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#define GICD_BASE (0x801000000000)
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#define GICR_BASE (0x801000002000)
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#define CONFIG_SYS_SERIAL0 0x87e024000000
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#define CONFIG_SYS_SERIAL1 0x87e025000000
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/* BOOTP options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
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/* Physical Memory Map */
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#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Initial environment variables */
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#define UBOOT_IMG_HEAD_SIZE 0x40
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/* C80000 - 0x40 */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr=08007ffc0\0" \
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"fdt_addr=0x94C00000\0" \
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"fdt_high=0x9fffffff\0"
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/* Do not preserve environment */
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_NO_RELOCATION 1
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#define PLL_REF_CLK 50000000 /* 50 MHz */
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#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
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#endif /* __THUNDERX_88XX_H__ */
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