mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
108 lines
3.2 KiB
C
108 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2010-2017 CS Systemes d'Information
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* Christophe Leroy <christophe.leroy@c-s.fr>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"sdram_type=SDRAM\0" \
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"flash_type=AM29LV160DB\0" \
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"loadaddr=0x400000\0" \
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"filename=uImage.lzma\0" \
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"nfsroot=/opt/ofs\0" \
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"dhcp_ip=ip=:::::eth0:dhcp\0" \
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"console_args=console=ttyCPM0,115200N8\0" \
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"flashboot=setenv bootargs " \
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"${console_args} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"mcr3k:eth0:off;" \
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"${ofl_args}; " \
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"bootm 0x04060000 - 0x04050000\0" \
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"tftpboot=setenv bootargs " \
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"${console_args} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"mcr3k:eth0:off " \
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"${ofl_args}; " \
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"tftp ${loadaddr} ${filename};" \
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"tftp 0xf00000 mcr3000.dtb;" \
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"bootm ${loadaddr} - 0xf00000\0" \
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"netboot=dhcp ${loadaddr} ${filename};" \
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"tftp 0xf00000 mcr3000.dtb;" \
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"setenv bootargs " \
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"root=/dev/nfs rw " \
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"${console_args} " \
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"${dhcp_ip};" \
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"bootm ${loadaddr} - 0xf00000\0" \
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"nfsboot=setenv bootargs " \
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"root=/dev/nfs rw nfsroot=${serverip}:${nfsroot} " \
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"${console_args} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"mcr3k:eth0:off;" \
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"bootm 0x04060000 - 0x04050000\0" \
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"dhcpboot=dhcp ${loadaddr} ${filename};" \
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"tftp 0xf00000 mcr3000.dtb;" \
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"setenv bootargs " \
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"${console_args} " \
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"${dhcp_ip} " \
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"${ofl_args}; " \
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"bootm ${loadaddr} - 0xf00000\0"
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#define CONFIG_IPADDR 192.168.0.3
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#define CONFIG_SERVERIP 192.168.0.1
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#define CONFIG_NETMASK 255.0.0.0
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_MEMTEST_START 0x00002000
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#define CONFIG_SYS_MEMTEST_END 0x00800000
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#define CONFIG_SYS_LOAD_ADDR 0x200000
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#define CONFIG_SYS_HZ 1000
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/* Definitions for initial stack pointer and data area (in DPRAM) */
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#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800)
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#define CONFIG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800)
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/* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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/* FLASH organization */
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#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 35
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
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#define CONFIG_SYS_MONITOR_LEN (320 << 10)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_MALLOC_LEN (4096 << 10)
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/* Environment Configuration */
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/* environment is in FLASH */
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#define CONFIG_ENV_OVERWRITE 1
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/* Ethernet configuration part */
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#define CONFIG_SYS_DISCOVER_PHY 1
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#define CONFIG_MII_INIT 1
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/* NAND configuration part */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_SYS_NAND_BASE 0x0C000000
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#endif /* __CONFIG_H */
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