mirror of
https://github.com/AsahiLinux/u-boot
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3709844f23
Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declarations with the appropriate value for the target's SoC or CPU. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Tom Rini <trini@konsulko.com>
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RK3288_COMMON_H
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#define __CONFIG_RK3288_COMMON_H
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#include <asm/arch/hardware.h>
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_OF_LIBFDT
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
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#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SYS_TEXT_BASE 0x00100000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
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#define CONFIG_SYS_LOAD_ADDR 0x00800800
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#define CONFIG_SPL_STACK 0xff718000
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#define CONFIG_SPL_TEXT_BASE 0xff704004
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#define CONFIG_ROCKCHIP_COMMON
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#define CONFIG_SPL_ROCKCHIP_COMMON
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#define CONFIG_SILENT_CONSOLE
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#ifndef CONFIG_SPL_BUILD
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# define CONFIG_SYS_CONSOLE_IS_IN_ENV
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# define CONFIG_CONSOLE_MUX
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#endif
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/* MMC/SD IP block */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_SDHCI
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#define CONFIG_DWMMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_PARTITION_UUIDS
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#define CONFIG_CMD_PART
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/* RAW SD card / eMMC locations. */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
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/* FAT sd card locations. */
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_PINCTRL_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_RAM_SUPPORT
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#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_TIME
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#define CONFIG_CMD_GPIO
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#define CONFIG_SYS_SDRAM_BASE 0
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#define CONFIG_NR_DRAM_BANKS 1
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#define SDRAM_BANK_SIZE (2UL << 30)
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#define CONFIG_CMD_I2C
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#ifndef CONFIG_SPL_BUILD
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#include <config_distro_defaults.h>
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00000000\0" \
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"pxefile_addr_r=0x00100000\0" \
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"fdt_addr_r=0x01f00000\0" \
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"kernel_addr_r=0x02000000\0" \
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"ramdisk_addr_r=0x04000000\0"
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/* First try to boot from SD (index 0), then eMMC (index 1 */
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1)
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#include <config_distro_bootcmd.h>
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/* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so
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* limit the fdt reallocation to that */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0x1fffffff\0" \
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"initrd_high=0x1fffffff\0" \
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ENV_MEM_LAYOUT_SETTINGS \
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ROCKCHIP_DEVICE_SETTINGS \
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BOOTENV
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#endif
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#endif
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