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660d5f0d49
"reset.c" and "cpu.c" have no architecture-specific code at all. Others are applicable to either ARC CPU. This change is a preparation to submission of ARCv2 architecture port. Even though ARCv1 and ARCv2 ISAs are not binary compatible most of built-in modules still have the same programming model - AUX registers are mapped in the same addresses and hold the same data (new featues extend existing ones). So only low-level assembly code (start-up, interrupt handlers) is left as CPU(actually ISA)-specific. This significantyl simplifies maintenance of multiple CPUs/ISAs. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com> |
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.. | ||
bootm.c | ||
cache.c | ||
cpu.c | ||
interrupts.c | ||
Makefile | ||
memcmp.S | ||
memcpy-700.S | ||
memset.S | ||
relocate.c | ||
reset.c | ||
sections.c | ||
strchr-700.S | ||
strcmp.S | ||
strcpy-700.S | ||
strlen.S | ||
timer.c |