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u-boot/arch/riscv/lib
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Heinrich Schuchardt 7c6ca03eae riscv: additional crash information 
If an exception occurs, the relocated program counter and return address
are required for an analysis.

With this patch you get:

    => exception undefined

    Unhandled exception: Illegal instruction
    EPC: 0000000080595908 RA: 000000008059c0c6 TVAL: 000000008030c01e
    EPC: 0000000080007908 RA: 000000008000e0c6 reloc adjusted

We can use the relocated addresses to find the involved functions in
u.boot.map:

    .text.do_undefined
                0x0000000080007908        0x8 cmd/built-in.o
    .text.cmd_process
                0x000000008000dfcc      0x11a common/built-in.o
                0x000000008000dfcc                cmd_process

If an exception occurs in an UEFI binary additionally the load addresses of
the UEFI binaries are needed. With this patch:

    => setenv efi_selftest exception
    => bootefi selftest

    Unhandled exception: Illegal instruction
    EPC: 000000008042e18a RA: 000000008042e18a TVAL: 000000008030c01e
    EPC: 000000007fea018a RA: 000000007fea018a reloc adjusted

    UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
    UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi'

The value pc=0x18a matches the position of the illegal instruction in
efi_selftest_miniapp_exception.efi (loaded as /bug.efi);

    asm volatile (".word 0xffffffff\n");

    00000180   93 85 C5 11  1C 64 22 85  82 97 FF FF  FF FF 1C 64

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:41 +08:00
..
andes_plic.c riscv: remove redundant logical constraint. 2020-08-14 14:39:09 +08:00
andes_plmt.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
asm-offsets.c riscv: Provide a mechanism to fix DT for reserved memory 2020-04-23 10:14:16 +08:00
boot.c command: Remove the cmd_tbl_t typedef 2020-05-18 18:36:55 -04:00
bootm.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
cache.c common: Move some cache and MMU functions out of common.h 2019-12-02 18:23:55 -05:00
crt0_riscv_efi.S efi_loader: use predefined constants in crt0_*_efi.S 2019-07-16 22:17:14 +00:00
elf_riscv32_efi.lds SPDX: Convert single license tags to Linux Kernel style 2018-05-29 14:44:21 +08:00
elf_riscv64_efi.lds SPDX: Convert single license tags to Linux Kernel style 2018-05-29 14:44:21 +08:00
fdt_fixup.c riscv: use log functions in fdt_fixup 2020-07-03 15:09:12 +08:00
image.c common: Drop image.h from common header 2020-05-18 17:33:33 -04:00
interrupts.c riscv: additional crash information 2020-08-14 14:39:41 +08:00
Makefile riscv: Do not build reset.c if SYSRESET is on 2020-07-03 15:07:48 +08:00
mkimage_fit_opensbi.sh riscv: add a generic FIT generator script 2019-08-26 16:07:42 +08:00
rdtime.c riscv: Implement riscv_get_time() API using rdtime instruction 2018-12-18 09:56:27 +08:00
reloc_riscv_efi.c riscv: Remove unused _relocate arguments 2018-07-19 16:31:37 -04:00
reset.c Revert "riscv: Allow use of reset drivers" 2020-07-24 14:55:31 +08:00
sbi.c riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01 2020-06-04 09:44:21 +08:00
sbi_ipi.c riscv: Clean up IPI initialization code 2020-07-01 15:01:22 +08:00
setjmp.S riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I 2018-11-26 13:57:29 +08:00
sifive_clint.c riscv: Make SiFive HiFive Unleashed board boot again 2020-07-24 14:55:04 +08:00
smp.c riscv: Clean up IPI initialization code 2020-07-01 15:01:22 +08:00
spl.c riscv: Call spl_board_init_f() in the generic SPL board_init_f() 2020-08-14 14:38:53 +08:00