mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 13:56:30 +00:00
e96751dad3
A set of environment variables needs to be updated to provide support for TIZEN download command (tizendown). Since DFU is used as a flashing backend, it is also necessary to extent malloc pool size for DFU buffer allocation. Moreover, for compatibility reasons (Win vs. Lin) new USB idProduct number for download gadget had to be added. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
333 lines
10 KiB
C
333 lines
10 KiB
C
/*
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* Copyright (C) 2011 Samsung Electronics
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* Heungjun Kim <riverful.kim@samsung.com>
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*
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* Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_SAMSUNG /* in a SAMSUNG core */
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#define CONFIG_S5P /* which is in a S5P Family */
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#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
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#define CONFIG_TRATS /* working with TRATS */
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#define CONFIG_TIZEN /* TIZEN lib */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0x10502000
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#endif
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_TEXT_BASE 0x63300000
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/* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
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#define CONFIG_SYS_CLK_FREQ_C210 24000000
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#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
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#define MACH_TYPE_TRATS 3928
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#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
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#include <asm/sizes.h>
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
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/* select serial console configuration */
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#define CONFIG_SERIAL2 /* use SERIAL 2 */
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#define CONFIG_BAUDRATE 115200
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/* MMC */
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MMC
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#define CONFIG_S5P_SDHCI
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#define CONFIG_SDHCI
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#define CONFIG_MMC_SDMA
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/* PWM */
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#define CONFIG_PWM
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/* It should define before config_cmd_default.h */
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#define CONFIG_SYS_NO_FLASH
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/* Command definition */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_MISC
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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#undef CONFIG_CMD_XIMG
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#undef CONFIG_CMD_CACHE
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#undef CONFIG_CMD_ONENAND
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#undef CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_DFU
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#define CONFIG_CMD_GPT
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#define CONFIG_CMD_SETEXPR
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/* FAT */
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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/* USB Composite download gadget - g_dnl */
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#define CONFIG_USBDOWNLOAD_GADGET
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/* TIZEN THOR downloader support */
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#define CONFIG_CMD_THOR_DOWNLOAD
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#define CONFIG_THOR_FUNCTION
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
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#define CONFIG_DFU_FUNCTION
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#define CONFIG_DFU_MMC
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/* USB Samsung's IDs */
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#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
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#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
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#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
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#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
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#define CONFIG_G_DNL_MANUFACTURER "Samsung"
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_BOOTARGS "Please use defined boot"
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#define CONFIG_BOOTCOMMAND "run mmcboot"
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
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#define CONFIG_BOOTBLOCK "10"
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#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
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/* Tizen - partitions definitions */
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#define PARTS_CSA "csa-mmc"
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#define PARTS_BOOTLOADER "u-boot"
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#define PARTS_BOOT "boot"
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#define PARTS_ROOT "platform"
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#define PARTS_DATA "data"
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#define PARTS_CSC "csc"
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#define PARTS_UMS "ums"
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#define PARTS_DEFAULT \
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"uuid_disk=${uuid_gpt_disk};" \
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"name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
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"name="PARTS_BOOTLOADER",size=60MiB," \
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"uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
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"name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
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"name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
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"name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
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"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
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"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
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#define CONFIG_DFU_ALT \
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"u-boot mmc 80 400;" \
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"uImage ext4 0 2;" \
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"exynos4210-trats.dtb ext4 0 2;" \
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""PARTS_ROOT" part 0 5\0"
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootk=" \
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"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
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"updatemmc=" \
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"mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
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"mmc boot 0 1 1 0\0" \
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"updatebackup=" \
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"mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
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"mmc boot 0 1 1 0\0" \
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"updatebootb=" \
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"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
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"lpj=lpj=3981312\0" \
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"nfsboot=" \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${nfsroot},nolock,tcp " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:" \
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"${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
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"; run bootk\0" \
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"ramfsboot=" \
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"setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
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"${console} ${meminfo} " \
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"initrd=0x43000000,8M ramdisk=8192\0" \
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"mmcboot=" \
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
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"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
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"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
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"boottrace=setenv opts initcall_debug; run bootcmd\0" \
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"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
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"verify=n\0" \
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"rootfstype=ext4\0" \
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"console=" CONFIG_DEFAULT_CONSOLE \
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"meminfo=crashkernel=32M@0x50000000\0" \
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"nfsroot=/nfsroot/arm\0" \
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"bootblock=" CONFIG_BOOTBLOCK "\0" \
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"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
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"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
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"${fdtfile}\0" \
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"mmcdev=0\0" \
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"mmcbootpart=2\0" \
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"mmcrootpart=5\0" \
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"opts=always_resume=1\0" \
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"partitions=" PARTS_DEFAULT \
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"dfu_alt_info=" CONFIG_DFU_ALT \
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"spladdr=0x40000100\0" \
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"splsize=0x200\0" \
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"splfile=falcon.bin\0" \
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"spl_export=" \
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"setexpr spl_imgsize ${splsize} + 8 ;" \
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"setenv spl_imgsize 0x${spl_imgsize};" \
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"setexpr spl_imgaddr ${spladdr} - 8 ;" \
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"setexpr spl_addr_tmp ${spladdr} - 4 ;" \
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"mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
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"spl export atags 0x40007FC0;" \
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"crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
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"mw.l ${spl_addr_tmp} ${splsize};" \
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"ext4write mmc ${mmcdev}:${mmcbootpart}" \
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" /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
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"setenv spl_imgsize;" \
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"setenv spl_imgaddr;" \
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"setenv spl_addr_tmp;\0" \
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"fdtaddr=40800000\0" \
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"fdtfile=exynos4210-trats.dtb\0"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "TRATS # "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
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#define CONFIG_SYS_HZ 1000
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/* TRATS has 4 banks of DRAM */
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#define CONFIG_NR_DRAM_BANKS 4
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
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#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
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#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
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#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
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#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_SIZE 4096
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#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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/* EXT4 */
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_EXT4_WRITE
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/* Falcon mode definitions */
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#define CONFIG_CMD_SPL
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#define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100
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/* GPT */
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#define CONFIG_EFI_PARTITION
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#define CONFIG_PARTITION_UUIDS
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
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#define CONFIG_SYS_I2C_SOFT_SPEED 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
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#define I2C_SOFT_DECLARATIONS2
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#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x7F
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#define CONFIG_SOFT_I2C_READ_REPEATED_START
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#define CONFIG_SYS_I2C_INIT_BOARD
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_SOFT_I2C_MULTI_BUS
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#define CONFIG_SYS_MAX_I2C_BUS 15
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#include <asm/arch/gpio.h>
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/* I2C PMIC */
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#define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7)
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#define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6)
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/* I2C FG */
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#define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1)
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#define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0)
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#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
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#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
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#define I2C_INIT multi_i2c_init()
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_MAX8997
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#define CONFIG_POWER_FG
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#define CONFIG_POWER_FG_MAX17042
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#define CONFIG_POWER_MUIC
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#define CONFIG_POWER_MUIC_MAX8997
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#define CONFIG_POWER_BATTERY
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#define CONFIG_POWER_BATTERY_TRATS
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_S3C_UDC_OTG
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_GADGET_VBUS_DRAW 2
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/* LCD */
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#define CONFIG_EXYNOS_FB
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#define CONFIG_LCD
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_32BPP
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#define CONFIG_FB_ADDR 0x52504000
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#define CONFIG_S6E8AX0
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#define CONFIG_EXYNOS_MIPI_DSIM
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
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#define CONFIG_CMD_USB_MASS_STORAGE
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#if defined(CONFIG_CMD_USB_MASS_STORAGE)
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#define CONFIG_USB_GADGET_MASS_STORAGE
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#endif
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/* Pass open firmware flat tree */
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#define CONFIG_OF_LIBFDT 1
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#endif /* __CONFIG_H */
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