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beeace9ba1
At the moment we have each SoC's memory map defined in its own cpu.h, which is included in include/configs/sunxi_common.h. This will be a problem with the introduction of Allwinner RISC-V support. Remove the inclusion of that header file from the common config header, instead move the required serial base addresses (for the SPL) into a separate header file. Then include the original cpu.h file only where we really need it, which is only under arch/arm now. This disentangles the architecture specific header files from the generic code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
39 lines
984 B
C
39 lines
984 B
C
/*
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* (C) Copyright 2022 Arm Limited
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SUNXI_CPU_SUNXI_NCAT2_H
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#define _SUNXI_CPU_SUNXI_NCAT2_H
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#define SUNXI_CCM_BASE 0x02001000
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#define SUNXI_TIMER_BASE 0x02050000
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#define SUNXI_TWI0_BASE 0x02502000
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#define SUNXI_TWI1_BASE 0x02502400
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#define SUNXI_TWI2_BASE 0x02502800
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#define SUNXI_TWI3_BASE 0x02502C00
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#define SUNXI_SRAMC_BASE 0x03000000
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/* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */
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#define SUNXI_SIDC_BASE 0x03006000
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#define SUNXI_SID_BASE 0x03006200
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#define SUNXI_GIC400_BASE 0x03020000
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#define SUNXI_MMC0_BASE 0x04020000
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#define SUNXI_MMC1_BASE 0x04021000
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#define SUNXI_MMC2_BASE 0x04022000
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#define SUNXI_R_CPUCFG_BASE 0x07000400
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#define SUNXI_PRCM_BASE 0x07010000
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#define SUNXI_CPUCFG_BASE 0x09010000
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#ifndef __ASSEMBLY__
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void sunxi_board_init(void);
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void sunxi_reset(void);
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int sunxi_get_sid(unsigned int *sid);
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#endif
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#endif /* _SUNXI_CPU_SUNXI_NCAT2_H */
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