mirror of
https://github.com/AsahiLinux/u-boot
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c316ee674f
cpu: - Add driver for microblaze cpu net: - Add support for DM_ETH_PHY to AXI emac and emaclite xilinx: - Switch platforms to DM_ETH_PHY - DT chagnes in ZynqMP and Zynq - Enable support for SquashFS zynqmp: - Add support for KR260 boards - Move BSS from address 0 - Move platform identification from board code to soc driver - Improve zynqmp_psu_init_minimize versal: - Enable loading app at EL1 serial: - Setup default address and clock rates for DEBUG uarts pinctrl: - Add support for tri state and output enable properties relocate-rela: - Clean relocate-rela implementation for ARM64 - Add support for Microblaze microblaze: - Add support for runtime relocation - Rework cache handling (wiring, Kconfig) based on cpuinfo - Remove interrupt support timer: - Extract axi timer driver from Microblaze to generic location -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYrlYngAKCRDKSWXLKUoM ITgbAJ9S9xO2QqxtuodWAYMtJfvZ14c7mgCeKnyFTrrBnJkC0wPsGqE71oNJ49o= =3gGm -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.10 cpu: - Add driver for microblaze cpu net: - Add support for DM_ETH_PHY to AXI emac and emaclite xilinx: - Switch platforms to DM_ETH_PHY - DT chagnes in ZynqMP and Zynq - Enable support for SquashFS zynqmp: - Add support for KR260 boards - Move BSS from address 0 - Move platform identification from board code to soc driver - Improve zynqmp_psu_init_minimize versal: - Enable loading app at EL1 serial: - Setup default address and clock rates for DEBUG uarts pinctrl: - Add support for tri state and output enable properties relocate-rela: - Clean relocate-rela implementation for ARM64 - Add support for Microblaze microblaze: - Add support for runtime relocation - Rework cache handling (wiring, Kconfig) based on cpuinfo - Remove interrupt support timer: - Extract axi timer driver from Microblaze to generic location
31 lines
1.3 KiB
Makefile
31 lines
1.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
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obj-y += timer-uclass.o
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obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
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obj-$(CONFIG_ANDES_PLMT_TIMER) += andes_plmt_timer.o
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obj-$(CONFIG_ARC_TIMER) += arc_timer.o
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obj-$(CONFIG_AST_TIMER) += ast_timer.o
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obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
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obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
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obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o
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obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
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obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
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obj-$(CONFIG_GXP_TIMER) += gxp-timer.o
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obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
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obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o
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obj-$(CONFIG_NPCM_TIMER) += npcm-timer.o
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obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
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obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o
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obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
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obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
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obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
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obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint_timer.o
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obj-$(CONFIG_STI_TIMER) += sti-timer.o
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obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
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obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
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obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
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obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o
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obj-$(CONFIG_IMX_GPT_TIMER) += imx-gpt-timer.o
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obj-$(CONFIG_XILINX_TIMER) += xilinx-timer.o
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