u-boot/drivers/mtd/spi
Takahiro Kuwano 7a4b6f8cf7 mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address mode
The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for multi-die package parts.

For single-die package parts (<=1Gb), registers can be accessed by 3-byte
address. Read, program, and erase use the 4B opcodes that always take
4-byte address regardless of flash's internal address mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:50:38 +05:30
..
fsl_espi_spl.c common: Move hang() to the same header as panic() 2020-01-17 17:53:40 -05:00
Kconfig mtd: spi-nor-core: Rename configuration macro for S28 support 2022-10-23 10:44:28 +05:30
Makefile spi: Allow separate control of SPI_FLASH_TINY for SPL/TPL 2020-08-03 22:19:54 -04:00
sandbox.c dm: Avoid accessing seq directly 2020-12-18 20:32:21 -07:00
sf-uclass.c spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode 2022-05-23 09:33:10 -04:00
sf_dataflash.c common: Drop display_options.h from common header 2022-08-10 13:46:55 -04:00
sf_internal.h mtd: spi-nor-core: Add support for DTR protocol 2021-06-28 12:00:32 +05:30
sf_mtd.c Audit <flash.h> inclusion 2022-08-04 16:18:47 -04:00
sf_probe.c mtd: spi-nor: Use spi-mem dirmap API 2022-09-13 12:08:41 -04:00
spi-nor-core.c mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address mode 2022-10-23 10:50:38 +05:30
spi-nor-ids.c mtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDs 2022-10-23 10:44:43 +05:30
spi-nor-tiny.c mtd: spi-nor-tiny: Add fixups for Cypress s25hl-t/s25hs-t 2021-06-29 19:16:54 +05:30