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8eb16b7f73
TI AM33XX has the same GPMC controller as OMAP3 so we could just use the existing omap_gpmc driver. This patch adds adds required definitions/intialization. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
120 lines
3.3 KiB
C
120 lines
3.3 KiB
C
/*
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* (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
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* Rohit Choraria <rohitkc@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_OMAP_GPMC_H
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#define __ASM_ARCH_OMAP_GPMC_H
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#define GPMC_BUF_EMPTY 0
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#define GPMC_BUF_FULL 1
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#define ECCCLEAR (0x1 << 8)
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#define ECCRESULTREG1 (0x1 << 0)
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#define ECCSIZE512BYTE 0xFF
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#define ECCSIZE1 (ECCSIZE512BYTE << 22)
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#define ECCSIZE0 (ECCSIZE512BYTE << 12)
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#define ECCSIZE0SEL (0x000 << 0)
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/* Generic ECC Layouts */
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/* Large Page x8 NAND device Layout */
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#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 12,\
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.eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
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9, 10, 11, 12},\
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.oobfree = {\
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{.offset = 13,\
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.length = 51 } } \
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}
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#endif
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/* Large Page x16 NAND device Layout */
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#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 12,\
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.eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
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10, 11, 12, 13},\
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.oobfree = {\
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{.offset = 14,\
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.length = 50 } } \
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}
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#endif
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/* Small Page x8 NAND device Layout */
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#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 3,\
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.eccpos = {1, 2, 3},\
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.oobfree = {\
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{.offset = 4,\
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.length = 12 } } \
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}
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#endif
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/* Small Page x16 NAND device Layout */
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#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 3,\
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.eccpos = {2, 3, 4},\
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.oobfree = {\
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{.offset = 5,\
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.length = 11 } } \
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}
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#endif
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#define GPMC_NAND_HW_BCH4_ECC_LAYOUT {\
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.eccbytes = 32,\
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.eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
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16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
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28, 29, 30, 31, 32, 33},\
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.oobfree = {\
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{.offset = 34,\
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.length = 30 } } \
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}
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#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\
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.eccbytes = 56,\
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.eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
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16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
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28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
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40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
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52, 53, 54, 55, 56, 57},\
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.oobfree = {\
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{.offset = 58,\
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.length = 6 } } \
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}
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#define GPMC_NAND_HW_BCH16_ECC_LAYOUT {\
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.eccbytes = 104,\
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.eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
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16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
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28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
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40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
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52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,\
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64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,\
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76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,\
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88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,\
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100, 101, 102, 103, 104, 105},\
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.oobfree = {\
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{.offset = 106,\
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.length = 8 } } \
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}
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#endif /* __ASM_ARCH_OMAP_GPMC_H */
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