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c46bf09e0b
adresses/addresses alernate/alternate asssuming/assuming calcualted/calculated enviroment/environment evalutation/evaluation falsh/flash labled/labeled paramaters/parameters Signed-off-by: Thomas Weber <thomas@tomweber.eu> Acked-by: Anatolij Gustschin <agust@denx.de>
208 lines
7.7 KiB
Text
208 lines
7.7 KiB
Text
AVR32 Port multiplexer configuration
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====================================
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On AVR32 chips, most external I/O pins are routed through a port
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multiplexer. There are currently two kinds of port multiplexer
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hardware around with different register interfaces:
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* PIO (AT32AP700x; this is also used on ARM AT91 chips)
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* GPIO (all other AVR32 chips)
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The "PIO" variant supports multiplexing up to two peripherals per pin
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in addition to GPIO (software control). Each pin has configurable
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pull-up, glitch filter, interrupt and multi-drive capabilities.
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The "GPIO" variant supports multiplexing up to four peripherals per
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pin in addition to GPIO. Each pin has configurable
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pull-up/pull-down/buskeeper, glitch filter, interrupt, open-drain and
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schmitt-trigger capabilities, as well as configurable drive strength
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and slew rate control.
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Both controllers are configured using the same API, but the functions
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may accept different values for some parameters depending on the
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actual portmux implementation, and some parameters may be ignored by
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one of the implementation (e.g. the "PIO" implementation will ignore
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the drive strength flags since the hardware doesn't support
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configurable drive strength.)
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Selecting the portmux implementation
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------------------------------------
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Since u-boot is lacking a Kconfig-style configuration engine, the
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portmux implementation must be selected manually by defining one of
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the following symbols:
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CONFIG_PORTMUX_PIO
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CONFIG_PORTMUX_GPIO
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depending on which implementation the chip in question uses.
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Identifying pins
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----------------
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The portmux configuration functions described below identify the pins
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to act on based on two parameters: A "port" (i.e. a block of pins
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that somehow belong together) and a pin mask. Both are defined in an
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implementation-specific manner.
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The available ports are defined on the form
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#define PORTMUX_PORT_A (something)
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where "A" matches the identifier given in the chip's data sheet, and
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"something" is whatever the portmux implementation needs to identify
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the port (usually a memory address).
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The pin mask is a bitmask where each '1' bit indicates a pin to apply
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the current operation to. The width of the bitmask may vary from port
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to port, but it is never wider than 32 bits (which is the width of
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'unsigned long' on avr32).
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Selecting functions
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-------------------
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Each pin can either be assigned to one of a predefined set of on-chip
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peripherals, or it can be set up to be controlled by software. For the
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former case, the portmux implementation defines an enum containing all
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the possible peripheral functions that can be selected. For example,
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the PIO implementation, which allows multiplexing two peripherals per
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pin, defines it like this:
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enum portmux_function {
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PORTMUX_FUNC_A,
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PORTMUX_FUNC_B,
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};
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To configure a set of pins to be connected to a given peripheral
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function, the following function is used.
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void portmux_select_peripheral(void *port, unsigned long pin_mask,
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enum portmux_function func, unsigned long flags);
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To configure a set of pins to be controlled by software (GPIO), the
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following function is used. In this case, no "function" argument is
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required since "GPIO" is a function in its own right.
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void portmux_select_gpio(void *port, unsigned int pin_mask,
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unsigned long flags);
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Both of these functions take a "flags" parameter which may be used to
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alter the default configuration of the pin. This is a bitmask of
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various flags defined in an implementation-specific way, but the names
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of the flags are the same on all implementations.
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PORTMUX_DIR_OUTPUT
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PORTMUX_DIR_INPUT
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These mutually-exclusive flags configure the initial direction of the
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pins. PORTMUX_DIR_OUTPUT means that the pins are driven by the CPU,
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while PORTMUX_DIR_INPUT means that the pins are tristated by the CPU.
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These flags are ignored by portmux_select_peripheral().
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PORTMUX_INIT_HIGH
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PORTMUX_INIT_LOW
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These mutually-exclusive flags configure the initial state of the
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pins: High (Vdd) or low (Vss). They are only effective when
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portmux_select_gpio() is called with the PORTMUX_DIR_OUTPUT flag set.
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PORTMUX_PULL_UP
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PORTMUX_PULL_DOWN
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PORTMUX_BUSKEEPER
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These mutually-exclusive flags are used to enable any on-chip CMOS
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resistors connected to the pins. PORTMUX_PULL_UP causes the pins to be
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pulled up to Vdd, PORTMUX_PULL_DOWN causes the pins to be pulled down
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to Vss, and PORTMUX_BUSKEEPER will keep the pins in whatever state
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they were left in by whatever was driving them last. If none of the
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flags are specified, the pins are left floating if no one are driving
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them; this is only recommended for always-output pins (e.g. extern
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address and control lines driven by the CPU.)
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Note that the "PIO" implementation will silently ignore the
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PORTMUX_PULL_DOWN flag and interpret PORTMUX_BUSKEEPER as
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PORTMUX_PULL_UP.
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PORTMUX_DRIVE_MIN
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PORTMUX_DRIVE_LOW
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PORTMUX_DRIVE_HIGH
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PORTMUX_DRIVE_MAX
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These mutually-exclusive flags determine the drive strength of the
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pins. PORTMUX_DRIVE_MIN will give low power-consumption, but may cause
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corruption of high-speed signals. PORTMUX_DRIVE_MAX will give high
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power-consumption, but may be necessary on pins toggling at very high
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speeds. PORTMUX_DRIVE_LOW and PORTMUX_DRIVE_HIGH specify something in
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between the other two.
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Note that setting the drive strength too high may cause excessive
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overshoot and EMI problems, which may in turn cause signal corruption.
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Also note that the "PIO" implementation will silently ignore these
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flags.
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PORTMUX_OPEN_DRAIN
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This flag will configure the pins as "open drain", i.e. setting the
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pin state to 0 will drive it low, while setting it to 1 will leave it
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floating (or, in most cases, let it be pulled high by an internal or
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external pull-up resistor.) In the data sheet for chips using the
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"PIO" variant, this mode is called "multi-driver".
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Enabling specific peripherals
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-----------------------------
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In addition to the above functions, each chip provides a set of
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functions for setting up the port multiplexer to use a given
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peripheral. The following are some of the functions available.
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All the functions below take a "drive_strength" parameter, which must
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be one of the PORTMUX_DRIVE_x flags specified above. Any other
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portmux flags will be silently filtered out.
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To set up the External Bus Interface (EBI), call
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void portmux_enable_ebi(unsigned int bus_width,
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unsigned long flags, unsigned long drive_strength)
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where "bus_width" must be either 16 or 32. "flags" can be any
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combination of the following flags.
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PORTMUX_EBI_CS(x) /* Enable chip select x */
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PORTMUX_EBI_NAND /* Enable NAND flash interface */
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PORTMUX_EBI_CF(x) /* Enable CompactFlash interface x */
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PORTMUX_EBI_NWAIT /* Enable NWAIT signal */
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To set up a USART, call
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void portmux_enable_usartX(unsigned long drive_strength);
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where X is replaced by the USART instance to be configured.
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To set up an ethernet MAC:
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void portmux_enable_macbX(unsigned long flags,
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unsigned long drive_strength);
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where X is replaced by the MACB instance to be configured. "flags" can
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be any combination of the following flags.
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PORTMUX_MACB_RMII /* Just set up the RMII interface */
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PORTMUX_MACB_MII /* Set up full MII interface */
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PORTMUX_MACB_SPEED /* Enable the SPEED pin */
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To set up the MMC controller:
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void portmux_enable_mmci(unsigned long slot, unsigned long flags
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unsigned long drive_strength);
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where "slot" identifies which of the alternative SD card slots to
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enable. "flags" can be any combination of the following flags:
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PORTMUX_MMCI_4BIT /* Enable 4-bit SD card interface */
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PORTMUX_MMCI_8BIT /* Enable 8-bit MMC+ interface */
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PORTMUX_MMCI_EXT_PULLUP /* Board has external pull-ups */
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To set up a SPI controller:
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void portmux_enable_spiX(unsigned long cs_mask,
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unsigned long drive_strength);
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where X is replaced by the SPI instance to be configured. "cs_mask" is
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a 4-bit bitmask specifying which of the four standard chip select
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lines to set up as GPIOs.
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