Michal Simek e2572b5544 xilinx: common: Do not save fdt_blob to bss section ... For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2020-09-23 10:31:41 +02:00
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board.c	xilinx: common: Do not save fdt_blob to bss section	2020-09-23 10:31:41 +02:00
board.h	xilinx: Introduce board_late_init_xilinx()	2020-04-27 13:57:17 +02:00