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https://github.com/AsahiLinux/u-boot
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2121c7e2d5
Because of fundamental interface issues in am65x pg1, only the initial sdhci1 node at 25 MHz was added in the u-boot.dtsi from which both the base-board.dts and r5-base-board.dts inherit the node. Move the node out to k3-am65-main.dtsi where it belongs and add the board specific properties in base-board.dts and r5-base-board.dts This ensures dts compatibility with the kernel dts in the base-board.dts and enables the SD card interface at 50 MHz and High Speed mode While we are here, also fix the main_mmc0_pins_default property to be included and inherit from the base-board.dts instead of the u-boot.dtsi Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
228 lines
5.8 KiB
Text
228 lines
5.8 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/dts-v1/;
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#include "k3-am654.dtsi"
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#include <dt-bindings/pinctrl/k3.h>
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/ {
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compatible = "ti,am654-evm", "ti,am654";
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model = "Texas Instruments AM654 Base Board";
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chosen {
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stdout-path = "serial2:115200n8";
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bootargs = "earlycon=ns16550a,mmio32,0x02800000";
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};
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aliases {
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remoteproc0 = &mcu_r5fss0_core0;
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remoteproc1 = &mcu_r5fss0_core1;
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};
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memory@80000000 {
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device_type = "memory";
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/* 4G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
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<0x00000008 0x80000000 0x00000000 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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secure_ddr: secure_ddr@9e800000 {
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reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
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alignment = <0x1000>;
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no-map;
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};
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};
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};
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&main_pmx0 {
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main_mmc0_pins_default: main_mmc0_pins_default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
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AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
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AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
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AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
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AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
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AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
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AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
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AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
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AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
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AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
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AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
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AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
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>;
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};
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main_mmc1_pins_default: main_mmc1_pins_default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
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AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
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AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
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AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
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AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
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AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
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AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
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AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
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>;
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};
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usb1_pins_default: usb1_pins_default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
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>;
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};
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main_i2c2_pins_default: main-i2c2-pins-default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
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AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
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>;
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};
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};
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&main_pmx1 {
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main_i2c0_pins_default: main-i2c0-pins-default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
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AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
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>;
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};
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main_i2c1_pins_default: main-i2c1-pins-default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
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AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
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>;
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};
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};
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&wkup_pmx0 {
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wkup_i2c0_pins_default: wkup-i2c0-pins-default {
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pinctrl-single,pins = <
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AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
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AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
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>;
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};
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mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
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pinctrl-single,pins = <
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AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
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AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
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AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
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AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
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AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
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AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
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AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
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AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
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AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
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AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
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AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
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>;
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};
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};
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&sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc0_pins_default>;
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bus-width = <8>;
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non-removable;
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ti,driver-strength-ohm = <50>;
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};
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/*
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* Because of erratas i2025 and i2026 for silicon revision 1.0, the
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* SD card interface might fail. Boards with sr1.0 are recommended to
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* disable sdhci1
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*/
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&sdhci1 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc1_pins_default>;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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};
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&wkup_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_i2c0_pins_default>;
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clock-frequency = <400000>;
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tca9554: gpio@38 {
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compatible = "nxp,pca9554";
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reg = <0x38>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&main_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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pca9555: gpio@21 {
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compatible = "nxp,pca9555";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&main_i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c1_pins_default>;
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clock-frequency = <400000>;
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};
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&main_i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c2_pins_default>;
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clock-frequency = <400000>;
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};
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&dwc3_1 {
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&usb1 {
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pinctrl-names = "default";
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pinctrl-0 = <&usb1_pins_default>;
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dr_mode = "otg";
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};
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&dwc3_0 {
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status = "disabled";
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};
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&usb0_phy {
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status = "disabled";
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};
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
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flash@0{
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <50000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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