u-boot/drivers/phy/rockchip
Eugen Hristev 3cc537842f phy: rockchip: inno-usb2: fix phy reg=0 case
The support for #address-cells=2 has a loophole: if the reg is actually 0,
but the #address-cells is actually 1, like in such case below:

syscon {
	#address-cells = <1>;

	phy {
		reg = <0 0x10>;
	};
};

then the second u32 of the 'reg' is the size, not the address.

The code should check for the parent's #address-cells value, and not
assume that if the first u32 is 0, then the #address-cells is 2, and the
reg property is something like
	reg = <0 0xff00 0x10>;

Fixed this by looking for the #address-cells value and retrieving the
reg address only if this is ==2.
To avoid breaking anything I also kept the check `if reg==0` as some DT's
may have a wrong #address-cells as parent and even if this commit is
correct, it might break the existing wrong device-trees.

Fixes: d538efb9ad ("phy: rockchip: inno-usb2: Add support #address_cells = 2")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-06-29 18:31:48 +08:00
..
Kconfig drivers: phy: add Innosilicon DSI-DPHY driver 2023-04-21 15:16:01 +08:00
Makefile drivers: phy: add Innosilicon DSI-DPHY driver 2023-04-21 15:16:01 +08:00
phy-rockchip-inno-dsidphy.c drivers: phy: add Innosilicon DSI-DPHY driver 2023-04-21 15:16:01 +08:00
phy-rockchip-inno-usb2.c phy: rockchip: inno-usb2: fix phy reg=0 case 2023-06-29 18:31:48 +08:00
phy-rockchip-naneng-combphy.c phy: rockchip: naneng-combphy: Support rk3588 2023-05-17 17:36:18 +08:00
phy-rockchip-pcie.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
phy-rockchip-snps-pcie3.c drivers: use dev_read_addr_ptr when cast to pointer 2023-05-06 17:28:18 +08:00
phy-rockchip-typec.c drivers: use dev_read_addr_ptr when cast to pointer 2023-05-06 17:28:18 +08:00