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f7c8e491e9
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with some differences. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
36 lines
947 B
C
36 lines
947 B
C
/*
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* Configuration for Xilinx ZynqMP zcu104
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*
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* (C) Copyright 2017 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQMP_ZCU104_H
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#define __CONFIG_ZYNQMP_ZCU104_H
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#define CONFIG_ZYNQ_SDHCI1
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#define CONFIG_SYS_I2C_MAX_HOPS 1
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#define CONFIG_SYS_NUM_I2C_BUSES 9
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#define CONFIG_SYS_I2C_BUSES { \
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{0, {I2C_NULL_HOP} }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
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{0, {{I2C_MUX_PCA9548, 0x74, 7} } }, \
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}
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#define CONFIG_PCA953X
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZCU104_H */
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