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u-boot/arch/arm/dts/at91sam9261.dtsi
Wenyou.Yang@microchip.com 324873e7c2 board: at91sam9261ek: Update to support DT and DM 
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:35 -04:00

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/*
* at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
*
* Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
*
* Licensed under GPLv2 only.
*/
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9261 family SoC";
compatible = "atmel,at91sam9261";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
tcb0 = &tcb0;
i2c0 = &i2c0;
ssc0 = &ssc0;
ssc1 = &ssc1;
ssc2 = &ssc2;
spi0 = &spi0;
};
cpus {
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};
memory {
reg = <0x20000000 0x08000000>;
};
clocks {
main_xtal: main_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
slow_xtal: slow_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x28000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
fb0: fb@0x00600000 {
compatible = "atmel,at91sam9261-lcdc";
reg = <0x00600000 0x1000>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
clocks = <&lcd_clk>, <&hclk1>;
clock-names = "lcdc_clk", "hclk";
status = "disabled";
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000>;
atmel,nand-addr-offset = <22>;
atmel,nand-cmd-offset = <21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
<&pioC 14 GPIO_ACTIVE_HIGH>,
<0>;
status = "disabled";
};
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
<18 IRQ_TYPE_LEVEL_HIGH 0>,
<19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
usb1: gadget@fffa4000 {
compatible = "atmel,at91sam9261-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udc_clk>, <&udpck>;
clock-names = "pclk", "hclk";
atmel,matrix = <&matrix>;
status = "disabled";
};
mmc0: mmc@fffa8000 {
compatible = "atmel,hsmci";
reg = <0xfffa8000 0x600>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mci0_clk>;
clock-names = "mci_clk";
status = "disabled";
};
i2c0: i2c@fffac000 {
compatible = "atmel,at91sam9261-i2c";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c_twi>;
reg = <0xfffac000 0x100>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
status = "disabled";
};
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>;
clock-names = "usart";
status = "disabled";
};
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>;
clock-names = "usart";
status = "disabled";
};
usart2: serial@fffb8000{
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>;
clock-names = "usart";
status = "disabled";
};
ssc0: ssc@fffbc000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffbc000 0x4000>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
clocks = <&ssc0_clk>;
clock-names = "pclk";
status = "disabled";
};
ssc1: ssc@fffc0000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffc0000 0x4000>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
clocks = <&ssc1_clk>;
clock-names = "pclk";
status = "disabled";
};
ssc2: ssc@fffc4000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffc4000 0x4000>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
clocks = <&ssc2_clk>;
clock-names = "pclk";
status = "disabled";
};
spi0: spi@fffc8000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffc8000 0x200>;
cs-gpios = <0>, <0>, <0>, <0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clock-names = "spi_clk";
status = "disabled";
};
spi1: spi@fffcc000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffcc000 0x200>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&spi1_clk>;
clock-names = "spi_clk";
status = "disabled";
};
ramc: ramc@ffffea00 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffea00 0x200>;
};
matrix: matrix@ffffee00 {
compatible = "atmel,at91sam9260-bus-matrix", "syscon";
reg = <0xffffee00 0x200>;
};
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
atmel,external-irqs = <29 30 31>;
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&mck>;
clock-names = "usart";
status = "disabled";
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
};
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x600>;
reg = <0xfffff400 0x200 /* pioA */
0xfffff600 0x200 /* pioB */
0xfffff800 0x200 /* pioC */
>;
atmel,mux-mask =
/* A B */
<0xffffffff 0xfffffff7>, /* pioA */
<0xffffffff 0xfffffff4>, /* pioB */
<0xffffffff 0xffffff07>; /* pioC */
u-boot,dm-pre-reloc;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
<AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
ssc2 {
pinctrl_ssc2_tx: ssc2_tx-0 {
atmel,pins =
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_ssc2_rx: ssc2_rx-0 {
atmel,pins =
<AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
tcb0 {
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
i2c0 {
pinctrl_i2c_bitbang: i2c-0-bitbang {
atmel,pins =
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
<AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_i2c_twi: i2c-0-twi {
atmel,pins =
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
fb {
pinctrl_fb: fb-0 {
atmel,pins =
<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
<AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
clocks = <&main_osc>;
};
plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
<190000000 240000000 2 1>;
};
pllb: pllbck@1 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
clocks = <&main>;
reg = <1>;
atmel,clk-input-range = <1000000 5000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
};
mck: masterck {
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
};
usb: usbck {
compatible = "atmel,at91rm9200-clk-usb";
#clock-cells = <0>;
atmel,clk-divisors = <1 2 4 0>;
clocks = <&pllb>;
};
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
prog0: progi@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog@2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
prog3: prog@3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck@10 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
pck3: pck@11 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
};
hclk0: hclk@16 {
#clock-cells = <0>;
reg = <16>;
clocks = <&mck>;
};
hclk1: hclk@17 {
#clock-cells = <0>;
reg = <17>;
clocks = <&mck>;
};
};
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
};
usart0_clk: usart0_clk@6 {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk@7 {
#clock-cells = <0>;
reg = <7>;
};
usart2_clk: usart2_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
mci0_clk: mci0_clk@9 {
#clock-cells = <0>;
reg = <9>;
};
udc_clk: udc_clk@10 {
#clock-cells = <0>;
reg = <10>;
};
twi0_clk: twi0_clk@11 {
reg = <11>;
#clock-cells = <0>;
};
spi0_clk: spi0_clk@12 {
#clock-cells = <0>;
reg = <12>;
};
spi1_clk: spi1_clk@13 {
#clock-cells = <0>;
reg = <13>;
};
ssc0_clk: ssc0_clk@14 {
#clock-cells = <0>;
reg = <14>;
};
ssc1_clk: ssc1_clk@15 {
#clock-cells = <0>;
reg = <15>;
};
ssc2_clk: ssc2_clk@16 {
#clock-cells = <0>;
reg = <16>;
};
tc0_clk: tc0_clk@17 {
#clock-cells = <0>;
reg = <17>;
};
tc1_clk: tc1_clk@18 {
#clock-cells = <0>;
reg = <18>;
};
tc2_clk: tc2_clk@19 {
#clock-cells = <0>;
reg = <19>;
};
ohci_clk: ohci_clk@20 {
#clock-cells = <0>;
reg = <20>;
};
lcd_clk: lcd_clk@21 {
#clock-cells = <0>;
reg = <21>;
};
};
};
rstc@fffffd00 {
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
clocks = <&slow_xtal>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&slow_xtal>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
};
rtc@fffffd20 {
compatible = "atmel,at91sam9260-rtt";
reg = <0xfffffd20 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&slow_xtal>;
status = "disabled";
};
watchdog@fffffd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfffffd40 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&slow_xtal>;
status = "disabled";
};
gpbr: syscon@fffffd50 {
compatible = "atmel,at91sam9260-gpbr", "syscon";
reg = <0xfffffd50 0x10>;
status = "disabled";
};
};
};
i2c@0 {
compatible = "i2c-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c_bitbang>;
gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
<&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
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