mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
b75d8dc564
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| MAINTAINERS | ||
| Makefile | ||
| mpc8315erdb.c | ||
| README | ||
| sdram.c | ||
Freescale MPC8315ERDB Board ----------------------------------------- 1. Board Switches and Jumpers S3 is used to set CONFIG_SYS_RESET_SOURCE. To boot the image at 0xFE000000 in NOR flash, use these DIP switch settings for S3 S4: +------+ +------+ | | | **** | | **** | | | +------+ ON +------+ ON 4321 4321 (where the '*' indicates the position of the tab of the switch.) To boot the image at the beginning of NAND flash, use these DIP switch settings for S3 S4: +------+ +------+ | * | | *** | | *** | | * | +------+ ON +------+ ON 4321 4321 (where the '*' indicates the position of the tab of the switch.) When booting from NAND, use u-boot-nand.bin, not u-boot.bin. 2. Memory Map The memory map looks like this: 0x0000_0000 0x07ff_ffff DDR 128M 0x8000_0000 0x8fff_ffff PCI MEM 256M 0x9000_0000 0x9fff_ffff PCI_MMIO 256M 0xe000_0000 0xe00f_ffff IMMR 1M 0xe030_0000 0xe03f_ffff PCI IO 1M 0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M When booting from NAND, NAND flash is CS0 and NOR flash is CS1. 3. Definitions 3.1 Explanation of NEW definitions in: include/configs/MPC8315ERDB.h CONFIG_MPC83xx MPC83xx family CONFIG_MPC831x MPC831x specific CONFIG_MPC8315 MPC8315 specific CONFIG_MPC8315ERDB MPC8315ERDB board specific 4. Compilation Assuming you're using BASH (or similar) as your shell: export CROSS_COMPILE=your-cross-compiler-prefix- make distclean make MPC8315ERDB_config (or MPC8315ERDB_NAND_config for u-boot-nand.bin) make all 5. Downloading and Flashing Images 5.1 Reflash U-Boot Image using U-Boot NOR flash: tftp 40000 u-boot.bin protect off all erase fe000000 fe1fffff cp.b 40000 fe000000 xxxx protect on all You have to supply the correct byte count with 'xxxx' from the TFTP result log. NAND flash: =>tftpboot $loadaddr <filename> =>nand erase 0 0x80000 =>nand write $loadaddr 0 0x80000 ...where 0x80000 is the filesize rounded up to the next 0x20000 increment. 5.2 Downloading and Booting Linux Kernel Ensure that all networking-related environment variables are set properly (including ipaddr, serverip, gatewayip (if needed), netmask, ethaddr, eth1addr, rootpath (if using NFS root), fdtfile, and bootfile). Then, do one of the following, depending on whether you want an NFS root or a ramdisk root: =>run nfsboot or =>run ramboot 6 Notes The console baudrate for MPC8315ERDB is 115200bps.