u-boot/arch/arm/mach-tegra/tegra186/cache.S
Stephen Warren a8d0526133 ARM: tegra186: call secure monitor for all cache-wide ops
An SMC call is required for all cache-wide operations on Tegra186. This
patch implements the two missing hooks now that U-Boot supports them, and
fixes the mapping of "hook name" to SMC call code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-11-07 14:36:29 -08:00

43 lines
1.1 KiB
ArmAsm

/*
* Copyright (c) 2016, NVIDIA CORPORATION.
*
* SPDX-License-Identifier: GPL-2.0
*/
#include <config.h>
#include <linux/linkage.h>
#define SMC_SIP_INVOKE_MCE 0x82FFFF00
#define MCE_SMC_ROC_FLUSH_CACHE (SMC_SIP_INVOKE_MCE | 11)
#define MCE_SMC_ROC_FLUSH_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 14)
#define MCE_SMC_ROC_CLEAN_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 15)
ENTRY(__asm_tegra_cache_smc)
mov x1, #0
mov x2, #0
mov x3, #0
mov x4, #0
mov x5, #0
mov x6, #0
smc #0
mov x0, #0
ret
ENDPROC(__asm_invalidate_l3_dcache)
ENTRY(__asm_invalidate_l3_dcache)
mov x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY & 0xffff)
movk x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY >> 16), lsl #16
b __asm_tegra_cache_smc
ENDPROC(__asm_invalidate_l3_dcache)
ENTRY(__asm_flush_l3_dcache)
mov x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY & 0xffff)
movk x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY >> 16), lsl #16
b __asm_tegra_cache_smc
ENDPROC(__asm_flush_l3_dcache)
ENTRY(__asm_invalidate_l3_icache)
mov x0, #(MCE_SMC_ROC_FLUSH_CACHE & 0xffff)
movk x0, #(MCE_SMC_ROC_FLUSH_CACHE >> 16), lsl #16
b __asm_tegra_cache_smc
ENDPROC(__asm_invalidate_l3_icache)