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https://github.com/AsahiLinux/u-boot
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7805cdf494
Replace the sdram_init() in board init and rockchip_sdram_size() in sdram driver for all the Rockchip SoCs which enable CONFIG_RAM. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Make dram_init() in rk3036-board.c conditional on CONFIG_RAM: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
44 lines
951 B
C
44 lines
951 B
C
/*
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* Copyright (c) 2017 Andy Yan
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <fdtdec.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3368.h>
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DECLARE_GLOBAL_DATA_PTR;
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int mach_cpu_init(void)
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{
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struct rk3368_pmu_grf *pmugrf;
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int node;
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node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rk3368-pmugrf");
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pmugrf = (struct rk3368_pmu_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
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rk_clrsetreg(&pmugrf->gpio0d_iomux,
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GPIO0D0_MASK | GPIO0D1_MASK |
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GPIO0D2_MASK | GPIO0D3_MASK,
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GPIO0D0_GPIO << GPIO0D0_SHIFT |
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GPIO0D1_GPIO << GPIO0D1_SHIFT |
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GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
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GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
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return 0;
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}
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int board_init(void)
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{
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return 0;
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}
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int dram_init_banksize(void)
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{
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/* Reserve 0x200000 for ATF bl31 */
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gd->bd->bi_dram[0].start = 0x200000;
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gd->bd->bi_dram[0].size = 0x3fe00000;
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return 0;
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}
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