mirror of
https://github.com/AsahiLinux/u-boot
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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
140 lines
3.1 KiB
C
140 lines
3.1 KiB
C
/*
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* Copyright (C) 2009 Texas Instruments Incorporated
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/arch/gpio.h>
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#include <netdev.h>
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#include <asm/arch/davinci_misc.h>
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#ifdef CONFIG_DAVINCI_MMC
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#include <mmc.h>
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#include <asm/arch/sdmmc_defs.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM365_EVM;
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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#ifdef CONFIG_DRIVER_TI_EMAC
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int board_eth_init(bd_t *bis)
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{
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uint8_t eeprom_enetaddr[6];
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int i;
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struct davinci_gpio *gpio1_base =
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(struct davinci_gpio *)DAVINCI_GPIO_BANK01;
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/* Configure PINMUX 3 to enable EMAC pins */
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writel((readl(PINMUX3) | 0x1affff), PINMUX3);
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/* Configure GPIO20 as output */
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writel((readl(&gpio1_base->dir) & ~(1 << 20)), &gpio1_base->dir);
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/* Toggle GPIO 20 */
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for (i = 0; i < 20; i++) {
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/* GPIO 20 low */
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writel((readl(&gpio1_base->out_data) & ~(1 << 20)),
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&gpio1_base->out_data);
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udelay(1000);
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/* GPIO 20 high */
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writel((readl(&gpio1_base->out_data) | (1 << 20)),
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&gpio1_base->out_data);
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}
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/* Configure I2C pins so that EEPROM can be read */
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writel((readl(PINMUX3) | 0x01400000), PINMUX3);
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/* Read Ethernet MAC address from EEPROM */
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if (dvevm_read_mac_address(eeprom_enetaddr))
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davinci_sync_env_enetaddr(eeprom_enetaddr);
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davinci_emac_initialize();
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return 0;
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}
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#endif
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#ifdef CONFIG_NAND_DAVINCI
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static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
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{
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struct nand_chip *this = mtd->priv;
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unsigned long wbase = (unsigned long) this->IO_ADDR_W;
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unsigned long rbase = (unsigned long) this->IO_ADDR_R;
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if (chip == 1) {
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__set_bit(14, &wbase);
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__set_bit(14, &rbase);
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} else {
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__clear_bit(14, &wbase);
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__clear_bit(14, &rbase);
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}
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this->IO_ADDR_W = (void *)wbase;
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this->IO_ADDR_R = (void *)rbase;
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}
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int board_nand_init(struct nand_chip *nand)
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{
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davinci_nand_init(nand);
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nand->select_chip = nand_dm365evm_select_chip;
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return 0;
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}
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#endif
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#ifdef CONFIG_DAVINCI_MMC
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static struct davinci_mmc mmc_sd0 = {
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.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
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.input_clk = 121500000,
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.host_caps = MMC_MODE_4BIT,
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.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
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.version = MMC_CTLR_VERSION_2,
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};
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#ifdef CONFIG_DAVINCI_MMC_SD1
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static struct davinci_mmc mmc_sd1 = {
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.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
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.input_clk = 121500000,
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.host_caps = MMC_MODE_4BIT,
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.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
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.version = MMC_CTLR_VERSION_2,
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};
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#endif
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int board_mmc_init(bd_t *bis)
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{
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int err;
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/* Add slot-0 to mmc subsystem */
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err = davinci_mmc_init(bis, &mmc_sd0);
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if (err)
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return err;
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#ifdef CONFIG_DAVINCI_MMC_SD1
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#define PUPDCTL1 0x01c4007c
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/* PINMUX(4)-DAT0-3/CMD; PINMUX(0)-CLK */
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writel((readl(PINMUX4) | 0x55400000), PINMUX4);
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writel((readl(PINMUX0) | 0x00010000), PINMUX0);
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/* Configure MMC/SD pins as pullup */
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writel((readl(PUPDCTL1) & ~0x07c0), PUPDCTL1);
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/* Add slot-1 to mmc subsystem */
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err = davinci_mmc_init(bis, &mmc_sd1);
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#endif
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return err;
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}
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#endif
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