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db7af51020
This patch adds documentation for j7200. TRM link https://www.ti.com/lit/pdf/spruiu1 Signed-off-by: Udit Kumar <u-kumar1@ti.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
332 lines
16 KiB
ReStructuredText
332 lines
16 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Udit Kumar <u-kumar1@ti.com>
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J7200 Platforms
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===============
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Introduction:
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-------------
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The J7200 family of SoCs are part of K3 Multicore SoC architecture platform
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targeting automotive applications. They are designed as a low power, high
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performance and highly integrated device architecture, adding significant
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enhancement on processing power, graphics capability, video and imaging
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processing, virtualization and coherent memory support.
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The device is partitioned into three functional domains, each containing
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specific processing cores and peripherals:
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1. Wake-up (WKUP) domain:
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* Device Management and Security Controller (DMSC)
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2. Microcontroller (MCU) domain:
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* Dual Core ARM Cortex-R5F processor
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3. MAIN domain:
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* Dual core 64-bit ARM Cortex-A72
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More info can be found in TRM: https://www.ti.com/lit/pdf/spruiu1
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Boot Flow:
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----------
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Below is the pictorial representation of boot flow:
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.. code-block:: text
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+------------------------------------------------------------------------+-----------------------+
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| DMSC | MCU R5 | A72 | MAIN R5/C7x |
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+------------------------------------------------------------------------+-----------------------+
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| +--------+ | | | |
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| | Reset | | | | |
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| +--------+ | | | |
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| : | | | |
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| +--------+ | +-----------+ | | |
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| | *ROM* |----------|-->| Reset rls | | | |
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| +--------+ | +-----------+ | | |
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| | | | : | | |
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| | ROM | | : | | |
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| |services| | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 ROM* | | | |
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| | | | +-------------+ | | |
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| | |<---------|---|Load and auth| | | |
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| | | | | tiboot3.bin | | | |
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| | Start | | +-------------+ | | |
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| | TIFS |<---------|---| Start | | | |
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| | | | | TIFS | | | |
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| +--------+ | +-------------+ | | |
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| : | | | | | |
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| +---------+ | | Load | | | |
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| | *TIFS* | | | system | | | |
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| +---------+ | | Config data | | | |
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| | |<--------|---| | | | |
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| | | | +-------------+ | | |
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| | | | : | | |
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| | | | : | | |
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| | | | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 SPL* | | | |
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| | | | +-------------+ | | |
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| | | | | DDR | | | |
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| | | | | config | | | |
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| | | | +-------------+ | | |
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| | | | | Load | | | |
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| | | | | tispl.bin | | | |
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| | | | +-------------+ | | |
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| | | | | Load R5 | | | |
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| | | | | firmware | | | |
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| | | | +-------------+ | | |
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| | |<--------|---| Start A72 | | | |
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| | | | | and jump to | | | |
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| | | | | DM fw image | | | |
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| | | | +-------------+ | | |
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| | | | | +-----------+ | |
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| | |---------|-----------------------|---->| Reset rls | | |
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| | | | | +-----------+ | |
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| | TIFS | | | : | |
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| |Services | | | +-----------+ | |
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| | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *A72 SPL* | | |
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| | | | | +-----------+ | |
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| | | | | | Load | | |
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| | | | | | u-boot.img| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *U-Boot* | | |
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| | | | | +-----------+ | |
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| | | | | | prompt | | |
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| | | | | +-----------+ | |
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| | | | | | Load R5 | | |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
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| | | | | | Load C7 | | +-----------+ |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
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| | | | | | +-----------+ |
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| | | | | | |
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| +---------+ | | | |
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+------------------------------------------------------------------------+-----------------------+
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- Here DMSC acts as master and provides all the critical services. R5/A72
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requests DMSC to get these services done as shown in the above diagram.
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Sources:
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--------
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1. SYSFW:
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Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
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Branch: master
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2. ATF:
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Tree: https://github.com/ARM-software/arm-trusted-firmware.git
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Branch: master
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3. OPTEE:
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Tree: https://github.com/OP-TEE/optee_os.git
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Branch: master
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4. DM Firmware:
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Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git
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Branch: ti-linux-firmware
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5. U-Boot:
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Tree: https://source.denx.de/u-boot/u-boot
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Branch: master
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Build procedure:
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----------------
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1. SYSFW:
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.. code-block:: bash
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make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- SOC=j7200 SBL=u-boot-spl.bin SYSFW_PATH=<path to sysfw>/ti-fs-firmware-j7200-gp.bin
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u-boot-spl.bin is generated at step 4.
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2. ATF:
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.. code-block:: bash
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make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
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3. OPTEE:
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.. code-block:: bash
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make PLATFORM=k3-j7200 CFG_ARM64_core=y
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4. U-Boot:
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* 4.1 R5:
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.. code-block:: bash
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make CROSS_COMPILE=arm-linux-gnueabihf- j7200_evm_r5_defconfig O=build/r5
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make CROSS_COMPILE=arm-linux-gnueabihf- O=build/r5
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* 4.2 A72:
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.. code-block:: bash
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make CROSS_COMPILE=aarch64-linux-gnu- j7200_evm_a72_defconfig O=build/a72
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make CROSS_COMPILE=aarch64-linux-gnu- ATF=<ATF dir>/build/k3/generic/release/bl31.bin TEE=<OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<DM firmware>/ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f O=build/a72
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Target Images
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--------------
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Copy the below images to an SD card and boot:
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- tiboot3.bin from step 1
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- tispl.bin, u-boot.img from 4.2
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Image formats:
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--------------
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- tiboot3.bin:
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.. code-block:: console
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+-----------------------+
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| X.509 |
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| Certificate |
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| +-------------------+ |
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| | R5 | |
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| | u-boot-spl.bin | |
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| +-------------------+ |
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| | FIT header | |
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| | +---------------+ | |
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| | | DTB 1...N | | |
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| | +---------------+ | |
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| +-------------------+ |
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| | FIT HEADER | |
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| | +---------------+ | |
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| | | sysfw.bin | | |
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| | +---------------+ | |
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| | | board config | | |
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| | +---------------+ | |
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| | | PM config | | |
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| | +---------------+ | |
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| | | | | |
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| | | RM config | | |
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| | +---------------+ | |
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| | | | | |
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| | | Secure config | | |
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| | +---------------+ | |
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| +-------------------+ |
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+-----------------------+
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- tispl.bin
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.. code-block:: console
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+-----------------------+
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| FIT HEADER |
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| +-------------------+ |
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| | A72 ATF | |
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| +-------------------+ |
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| | A72 OPTEE | |
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| +-------------------+ |
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| | R5 DM FW | |
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| +-------------------+ |
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| | A72 SPL | |
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| +-------------------+ |
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| | SPL DTB 1...N | |
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| +-------------------+ |
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+-----------------------+
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Switch Setting for Boot Mode
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----------------------------
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Boot Mode pins provide means to select the boot mode and options before the
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device is powered up. After every POR, they are the main source to populate
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the Boot Parameter Tables.
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The following table shows some common boot modes used on J7200 platform. More
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details can be found in the Technical Reference Manual:
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https://www.ti.com/lit/pdf/spruiu1 under the `Boot Mode Pins` section.
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*Boot Modes*
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============ ============= =============
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Switch Label SW9: 12345678 SW8: 12345678
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============ ============= =============
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SD 00000000 10000010
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EMMC 01000000 10000000
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OSPI 01000000 00000110
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UART 01110000 00000000
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USB DFU 00100000 10000000
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============ ============= =============
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For SW8 and SW9, the switch state in the "ON" position = 1.
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eMMC:
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-----
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ROM supports booting from eMMC raw read or UDA FS mode.
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Below is memory layout in case of booting from
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boot 0/1 partition in raw mode.
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Current allocated size for tiboot3 size is 1MB, tispl is 2MB.
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Size of u-boot.img is taken 4MB for refernece,
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But this is subject to change depending upon atf, optee size
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.. code-block:: console
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boot0/1 partition (8 MB) user partition
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0x0+----------------------------------+ 0x0+------------------------+
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| tiboot3.bin (1 MB) | | |
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0x800+----------------------------------+ | |
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| tispl.bin (2 MB) | | |
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0x1800+----------------------------------+ | |
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| u-boot.img (4MB) | | |
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0x3800+----------------------------------+ | |
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0x3900+ environment | | |
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0x3A00+----------------------------------+ +-------------------------+
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In case of UDA FS mode booting, following is layout.
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All boot images tiboot3.bin, tispl and u-boot should be written to
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fat formatted UDA FS as file.
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.. code-block:: console
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boot0/1 partition (8 MB) user partition
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0x0+---------------------------------+ 0x0+-------------------------+
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| | | tiboot3.bin* |
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0x800+----------------------------------+ | |
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| | | tispl.bin |
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0x1800+----------------------------------+ | |
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| | | u-boot.img |
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0x3800+----------------------------------+ | |
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0x3900+ | | environment |
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0x3A00+----------------------------------+ +-------------------------+
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In case of booting from eMMC, write above images into raw or UDA FS.
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and set mmc partconf accordingly.
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