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Fabio Estevam edf0093732 mx6: ddr: Allow changing REFSEL and REFR fields 
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
2016-09-06 18:22:48 +02:00
..
Kconfig mx6: remove SYS_SOC from board Kconfig 2015-09-13 10:37:29 +02:00
MAINTAINERS arm: mx6: Add Barco platinum-picon and platinum-titanium 2015-01-19 09:07:31 +01:00
Makefile arm: mx6: Add Barco platinum-picon and platinum-titanium 2015-01-19 09:07:31 +01:00
platinum.c arm: mx6: Add Barco platinum-picon and platinum-titanium 2015-01-19 09:07:31 +01:00
platinum.h mx6: fix warning in platinum board 2015-01-22 10:59:03 +01:00
platinum_picon.c imx: clock support enet2 anatop clock support 2015-09-02 15:29:14 +02:00
platinum_titanium.c arm: mx6: Add Barco platinum-picon and platinum-titanium 2015-01-19 09:07:31 +01:00
spl_picon.c mx6: ddr: Allow changing REFSEL and REFR fields 2016-09-06 18:22:48 +02:00
spl_titanium.c mx6: ddr: Allow changing REFSEL and REFR fields 2016-09-06 18:22:48 +02:00