mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-07 13:44:29 +00:00
e9ccb2f526
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <dm.h>
|
|
#include <syscon.h>
|
|
#include <asm/arch-rockchip/clock.h>
|
|
|
|
static const struct udevice_id px30_syscon_ids[] = {
|
|
{ .compatible = "rockchip,px30-pmu", .data = ROCKCHIP_SYSCON_PMU },
|
|
{ .compatible = "rockchip,px30-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
|
|
{ .compatible = "rockchip,px30-grf", .data = ROCKCHIP_SYSCON_GRF },
|
|
{ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(syscon_px30) = {
|
|
.id = UCLASS_SYSCON,
|
|
.name = "px30_syscon",
|
|
.of_match = px30_syscon_ids,
|
|
};
|
|
|
|
#if CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
static int px30_syscon_bind_of_platdata(struct udevice *dev)
|
|
{
|
|
dev->driver_data = dev->driver->of_match->data;
|
|
debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
|
|
|
|
return 0;
|
|
}
|
|
|
|
U_BOOT_DRIVER(rockchip_px30_pmu) = {
|
|
.name = "rockchip_px30_pmu",
|
|
.id = UCLASS_SYSCON,
|
|
.of_match = px30_syscon_ids,
|
|
.bind = px30_syscon_bind_of_platdata,
|
|
};
|
|
|
|
U_BOOT_DRIVER(rockchip_px30_pmugrf) = {
|
|
.name = "rockchip_px30_pmugrf",
|
|
.id = UCLASS_SYSCON,
|
|
.of_match = px30_syscon_ids + 1,
|
|
.bind = px30_syscon_bind_of_platdata,
|
|
};
|
|
|
|
U_BOOT_DRIVER(rockchip_px30_grf) = {
|
|
.name = "rockchip_px30_grf",
|
|
.id = UCLASS_SYSCON,
|
|
.of_match = px30_syscon_ids + 2,
|
|
.bind = px30_syscon_bind_of_platdata,
|
|
};
|
|
#endif
|