Andy Fleming e76cd5d4cf 8xxx: Change all 8*xx_DDR addresses to 8xxx ... There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR2, DDR3). A recent patchset added 85xx-specific ones to code which was used by 86xx systems. After reviewing places where these constants were used, and noting that the type definitions of the pointers assigned to point to those addresses were the same, the cleanest approach to fixing this problem was to unify the namespace for the 85xx, 83xx, and 86xx DDR address definitions. This patch does: s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g All 85xx, 86xx, and 83xx have been built with this change. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Andy Fleming <afleming@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>		2012-11-27 17:45:17 -06:00
..
ddr.c	powerpc/85xx: Fix P2020DS booting	2011-10-18 01:31:08 -05:00
law.c	powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe code	2011-01-14 01:32:20 -06:00
Makefile	punt unused clean/distclean targets	2011-10-15 22:20:36 +02:00
p2020ds.c	8xxx: Change all 8*xx_DDR addresses to 8xxx	2012-11-27 17:45:17 -06:00
tlb.c	powerpc/85xx: Enable eSDHC boot support on P2020 DS	2011-04-04 22:26:32 -05:00