mirror of
https://github.com/AsahiLinux/u-boot
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2ae1824196
Clean up Makefile, and drop a lot of the config.mk files on the way. We now also automatically pick all boards that are listed in boards.cfg (and with all configurations), so we can drop the redundant entries from MAKEALL to avoid building these twice. Signed-off-by: Wolfgang Denk <wd@denx.de>
152 lines
3.9 KiB
C
152 lines
3.9 KiB
C
/*
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* Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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/*
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* PCI Configuration space access support for MPC83xx PCI Bridge
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*/
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#include <asm/mmu.h>
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#include <asm/io.h>
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#include <common.h>
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#include <mpc83xx.h>
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#include <pci.h>
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#include <i2c.h>
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#include <asm/fsl_i2c.h>
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#include "../common/pq-mds-pib.h"
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DECLARE_GLOBAL_DATA_PTR;
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static struct pci_region pci1_regions[] = {
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{
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bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
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size: CONFIG_SYS_PCI1_MEM_SIZE,
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flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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},
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{
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bus_start: CONFIG_SYS_PCI1_IO_BASE,
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phys_start: CONFIG_SYS_PCI1_IO_PHYS,
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size: CONFIG_SYS_PCI1_IO_SIZE,
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flags: PCI_REGION_IO
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},
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{
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bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
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phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
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size: CONFIG_SYS_PCI1_MMIO_SIZE,
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flags: PCI_REGION_MEM
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},
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};
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#ifdef CONFIG_MPC83XX_PCI2
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static struct pci_region pci2_regions[] = {
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{
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bus_start: CONFIG_SYS_PCI2_MEM_BASE,
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phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
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size: CONFIG_SYS_PCI2_MEM_SIZE,
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flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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},
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{
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bus_start: CONFIG_SYS_PCI2_IO_BASE,
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phys_start: CONFIG_SYS_PCI2_IO_PHYS,
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size: CONFIG_SYS_PCI2_IO_SIZE,
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flags: PCI_REGION_IO
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},
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{
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bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
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phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
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size: CONFIG_SYS_PCI2_MMIO_SIZE,
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flags: PCI_REGION_MEM
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},
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};
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#endif
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void pci_init_board(void)
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#ifdef CONFIG_PCISLAVE
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{
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volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
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volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
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volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
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struct pci_region *reg[] = { pci1_regions };
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/* Configure PCI Local Access Windows */
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pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
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pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
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mpc83xx_pci_init(1, reg);
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/*
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* Configure PCI Inbound Translation Windows
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*/
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pci_ctrl[0].pitar0 = 0x0;
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pci_ctrl[0].pibar0 = 0x0;
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pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
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PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
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pci_ctrl[0].pitar1 = 0x0;
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pci_ctrl[0].pibar1 = 0x0;
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pci_ctrl[0].piebar1 = 0x0;
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pci_ctrl[0].piwar1 &= ~PIWAR_EN;
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pci_ctrl[0].pitar2 = 0x0;
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pci_ctrl[0].pibar2 = 0x0;
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pci_ctrl[0].piebar2 = 0x0;
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pci_ctrl[0].piwar2 &= ~PIWAR_EN;
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/* Unlock the configuration bit */
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mpc83xx_pcislave_unlock(0);
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printf("PCI: Agent mode enabled\n");
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}
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#else
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{
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volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
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volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
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volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
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#ifndef CONFIG_MPC83XX_PCI2
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struct pci_region *reg[] = { pci1_regions };
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#else
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struct pci_region *reg[] = { pci1_regions, pci2_regions };
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#endif
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/* initialize the PCA9555PW IO expander on the PIB board */
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pib_init();
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#if defined(CONFIG_PCI_66M)
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clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
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printf("PCI clock is 66MHz\n");
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#elif defined(CONFIG_PCI_33M)
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clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
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OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
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printf("PCI clock is 33MHz\n");
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#else
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clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
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printf("PCI clock is 66MHz\n");
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#endif
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udelay(2000);
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/* Configure PCI Local Access Windows */
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pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
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pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
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udelay(2000);
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#ifndef CONFIG_MPC83XX_PCI2
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mpc83xx_pci_init(1, reg);
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#else
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mpc83xx_pci_init(2, reg);
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#endif
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}
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#endif /* CONFIG_PCISLAVE */
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