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76cff2b108
DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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| evm.c | ||
| Kconfig | ||
| MAINTAINERS | ||
| Makefile | ||
| mux_data.h | ||
| README | ||
Summary
=======
This document covers various features of the 'dra7xx_evm' build and some
related uses.
eMMC boot partition use
=======================
It is possible, depending on SYSBOOT configuration to boot from the eMMC
boot partitions using (name depending on documentation referenced)
Alternative Boot operation mode or Boot Sequence Option 1/2. In this
example we load MLO and u-boot.img from the build into DDR and then use
'mmc bootbus' to set the required rate (see TRM) and 'mmc partconfig' to
set boot0 as the boot device.
U-Boot # setenv autoload no
U-Boot # usb start
U-Boot # dhcp
U-Boot # mmc dev 1 1
U-Boot # tftp ${loadaddr} dra7xx/MLO
U-Boot # mmc write ${loadaddr} 0 100
U-Boot # tftp ${loadaddr} dra7xx/u-boot.img
U-Boot # mmc write ${loadaddr} 300 400
U-Boot # mmc bootbus 1 2 0 2
U-Boot # mmc partconf 1 1 1 0
U-Boot # mmc rst-function 1 1