mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 02:20:25 +00:00
292 lines
7.6 KiB
C
292 lines
7.6 KiB
C
/*
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Boundary Devices Nitrogen6X
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* and Freescale i.MX6Q Sabre Lite boards.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MX6
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_MACH_TYPE 3769
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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#define CONFIG_MXC_GPIO
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#define CONFIG_CMD_FUSE
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONFIG_CMD_SF
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SST
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#define CONFIG_MXC_SPI
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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#endif
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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/* OCOTP Configs */
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#define CONFIG_CMD_IMXOTP
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#ifdef CONFIG_CMD_IMXOTP
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#define CONFIG_IMX_OTP
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#define IMX_OTP_BASE OCOTP_BASE_ADDR
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#define IMX_OTP_ADDR_MAX 0x7F
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#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
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#define IMX_OTPWRITE_ENABLED
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#endif
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#ifdef CONFIG_MX6Q
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#define CONFIG_CMD_SATA
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#endif
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/*
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* SATA Configs
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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#endif
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 6
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL_KSZ9021
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_FAT
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* Miscellaneous commands */
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#define CONFIG_CMD_BMODE
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#define CONFIG_CMD_SETEXPR
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/* Framebuffer and LCD */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_IPUV3_CLK 260000000
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#define CONFIG_CMD_HDMIDETECT
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#define CONFIG_CONSOLE_MUX
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_IMLS
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_PREBOOT ""
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DRIVE_SATA "sata "
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#else
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#define CONFIG_DRIVE_SATA
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#endif
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_DRIVE_MMC "mmc "
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#else
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#define CONFIG_DRIVE_MMC
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#endif
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#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"console=ttymxc1\0" \
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"clearenv=if sf probe || sf probe || sf probe 1 ; then " \
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"sf erase 0xc0000 0x2000 && " \
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"echo restored environment to factory default ; fi\0" \
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"bootcmd=for dtype in " CONFIG_DRIVE_TYPES \
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"; do " \
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"for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
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"for fs in fat ext2 ; do " \
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"${fs}load " \
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"${dtype} ${disk}:1 " \
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"10008000 " \
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"/6x_bootscript" \
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"&& source 10008000 ; " \
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"done ; " \
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"done ; " \
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"done; " \
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"setenv stdout serial,vga ; " \
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"echo ; echo 6x_bootscript not found ; " \
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"echo ; echo serial console at 115200, 8N1 ; echo ; " \
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"echo details at http://boundarydevices.com/6q_bootscript ; " \
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"setenv stdout serial\0" \
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"upgradeu=for dtype in " CONFIG_DRIVE_TYPES \
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"; do " \
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"for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
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"for fs in fat ext2 ; do " \
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"${fs}load ${dtype} ${disk}:1 10008000 " \
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"/6x_upgrade " \
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"&& source 10008000 ; " \
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"done ; " \
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"done ; " \
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"done\0" \
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT "U-Boot > "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 1024
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_CMDLINE_EDITING
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE (8 * 1024)
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/* #define CONFIG_ENV_IS_IN_MMC */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
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#define CONFIG_ENV_OFFSET (768 * 1024)
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#define CONFIG_ENV_SECT_SIZE (8 * 1024)
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#endif
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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#ifndef CONFIG_SYS_DCACHE_OFF
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#define CONFIG_CMD_CACHE
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#endif
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#define CONFIG_CMD_BMP
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#define CONFIG_CMD_TIME
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_SUPPORT_RAW_INITRD
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#define CONFIG_CMD_FS_GENERIC
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#endif /* __CONFIG_H */
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