Michal Simek 767aa16d41 ARM: zynq: Rename bus to be align with simple-bus yaml ... Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI point-to-point channels for communicating addresses, data, and response transactions between master and slave clients. This ARM AMBA 3.0..." Issues are reported as: .. amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' >From schema: ../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml Similar change has been done for Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com		2021-06-23 09:48:35 +02:00
..
arc	lmb: move CONFIG_LMB in Kconfig	2021-04-22 14:09:45 -04:00
arm	ARM: zynq: Rename bus to be align with simple-bus yaml	2021-06-23 09:48:35 +02:00
m68k	allow opting out of WATCHDOG_RESET() from timer interrupt	2021-04-28 10:05:13 +02:00
microblaze	lmb: move CONFIG_LMB in Kconfig	2021-04-22 14:09:45 -04:00
mips	MIPS: remove deprecated qemu_mips board	2021-05-25 15:35:06 +02:00
nds32	treewide: Convert macro and uses of __section(foo) to __section("foo")	2021-05-24 14:21:30 -04:00
nios2	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
powerpc	board: freescale: t208xrdb: add a config option for rev D dts fixups	2021-06-17 11:46:11 +05:30
riscv	riscv: andes_plic: Fix riscv_get_ipi() mask	2021-06-17 09:39:46 +08:00
sandbox	net: use the same alias stem for ethernet as linux	2021-06-18 11:29:17 +03:00
sh	lmb: move CONFIG_LMB in Kconfig	2021-04-22 14:09:45 -04:00
x86	treewide: Convert macro and uses of __section(foo) to __section("foo")	2021-05-24 14:21:30 -04:00
xtensa	treewide: Convert macro and uses of __section(foo) to __section("foo")	2021-05-24 14:21:30 -04:00
.gitignore
Kconfig	ARM: make LTO available	2021-05-24 14:21:30 -04:00
u-boot-elf.lds