mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 06:00:43 +00:00
08574ed339
This converts the following to Kconfig: CONFIG_SYS_MONITOR_LEN To do this, we set a default of 0 for everyone because there are a number of cases where we define CONFIG_SYS_MONITOR_LEN but the only impact is that we set TOTAL_MALLOC_LEN to be CONFIG_SYS_MALLOC_LEN + CONFIG_ENV_SIZE, so we must continue to allow all boards to set this value. Update the SPL code to use 200 KB as the default raw U-Boot size directly, if we don't have a real CONFIG_SYS_MONITOR_LEN value. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
103 lines
2.7 KiB
Text
103 lines
2.7 KiB
Text
CONFIG_ARM=y
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CONFIG_COUNTER_FREQUENCY=25000000
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CONFIG_GIC_V3_ITS=y
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CONFIG_TARGET_LS2080ARDB=y
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CONFIG_TEXT_BASE=0x30100000
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CONFIG_SYS_MALLOC_LEN=0x202000
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_ENV_SIZE=0x2000
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
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CONFIG_FSL_LS_PPA=y
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CONFIG_AHCI=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_VID=y
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CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv"
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CONFIG_VOL_MONITOR_IR36021_READ=y
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CONFIG_VOL_MONITOR_IR36021_SET=y
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CONFIG_FSL_QIXIS=y
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# CONFIG_QIXIS_I2C_ACCESS is not set
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
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# CONFIG_SYS_MALLOC_F is not set
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CONFIG_REMAKE_ELF=y
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_MP=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_DYNAMIC_SYS_CLK_FREQ=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
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CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;"
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CONFIG_MISC_INIT_R=y
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CONFIG_RESET_PHY_R=y
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CONFIG_SYS_MAXARGS=64
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CONFIG_SYS_PBSIZE=532
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="DPMAC1@xgmii"
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SATA=y
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CONFIG_SATA_CEVA=y
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CONFIG_DDR_CLK_FREQ=133333333
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CONFIG_DIMM_SLOTS_PER_CTLR=2
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CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
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CONFIG_DDR_ECC=y
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CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
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CONFIG_SYS_FSL_DDR_INTLV_256B=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x57
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_EMPTY_INFO=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_FLASH_QUIET_TEST=y
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CONFIG_SYS_MAX_FLASH_SECT=1024
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CONFIG_MTD_RAW_NAND=y
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CONFIG_NAND_FSL_IFC=y
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CONFIG_SYS_NAND_ONFI_DETECTION=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_AQUANTIA=y
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CONFIG_PHY_CORTINA=y
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CONFIG_CORTINA_FW_ADDR=0x580980000
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CONFIG_FSL_MEMAC=y
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CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_NVME_PCI=y
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CONFIG_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_LAYERSCAPE_RC=y
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CONFIG_DM_SCSI=y
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CONFIG_CONS_INDEX=2
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_RSA=y
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CONFIG_RSA_SOFTWARE_EXP=y
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