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The digital phase-locked loop (DPLL) provides all interface clocks and functional clocks to the processor of the AM33xx device. The AM33xx device integrates five different DPLLs: * Core DPLL * Per DPLL * LCD DPLL * DDR DPLL * MPU DPLL The patch adds support for the compatible strings: * "ti,am3-dpll-core-clock" * "ti,am3-dpll-no-gate-clock" * "ti,am3-dpll-no-gate-j-type-clock" * "ti,am3-dpll-x2-clock" The code is loosely based on the drivers/clk/ti/dpll.c drivers of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/dpll.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
17 lines
520 B
Text
17 lines
520 B
Text
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
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#
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config CLK_TI_AM3_DPLL
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bool "TI AM33XX Digital Phase-Locked Loop (DPLL) clock drivers"
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depends on CLK && OF_CONTROL
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help
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This enables the DPLL clock drivers support on AM33XX SoCs. The DPLL
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provides all interface clocks and functional clocks to the processor.
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config CLK_TI_MUX
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bool "TI mux clock driver"
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depends on CLK && OF_CONTROL && CLK_CCF
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help
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This enables the mux clock driver support on TI's SoCs.
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