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https://github.com/AsahiLinux/u-boot
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0830d72bb9
This patch adds support for authentication of both plain text and encrypted binaries. A new SECDEV package is needed to enable encryption of binaries by default for AM3x. The ROM authentication API detects encrypted images at runtime and automatically decrypts the image if the signature verification passes. Addition of encryption on AM3x results in a change in the image format. On AM4x, AM5x and, on AM3x devices signing clear test images, the signature is appended to the end of the binary. On AM3x, when the SECDEV package is used to create signed and encrypted images, the signature is added as a header to the start of the binary. So the binary size calculation has been updated to reflect this change. The signing tools and encrypted image format for AM3x cannot be changed to behave like AM4x and AM5x to maintain backward compatibility with older Sitara M-Shield releases. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
377 lines
10 KiB
C
377 lines
10 KiB
C
/*
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*
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* Common security related functions for OMAP devices
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*
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* (C) Copyright 2016-2017
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* Texas Instruments, <www.ti.com>
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*
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* Daniel Allred <d-allred@ti.com>
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* Andreas Dannenberg <dannenberg@ti.com>
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* Harinarayan Bhatta <harinarayan@ti.com>
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* Andrew F. Davis <afd@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <stdarg.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/cache.h>
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#include <asm/omap_common.h>
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#include <asm/omap_sec_common.h>
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#include <asm/spl.h>
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#include <asm/ti-common/sys_proto.h>
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#include <mapmem.h>
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#include <spl.h>
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#include <tee/optee.h>
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/* Index for signature verify ROM API */
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#ifdef CONFIG_AM33XX
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#define API_HAL_KM_VERIFYCERTIFICATESIGNATURE_INDEX (0x0000000C)
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#else
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#define API_HAL_KM_VERIFYCERTIFICATESIGNATURE_INDEX (0x0000000E)
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#endif
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/* Index for signature PPA-based TI HAL APIs */
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#define PPA_HAL_SERVICES_START_INDEX (0x200)
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#define PPA_SERV_HAL_TEE_LOAD_MASTER (PPA_HAL_SERVICES_START_INDEX + 23)
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#define PPA_SERV_HAL_TEE_LOAD_SLAVE (PPA_HAL_SERVICES_START_INDEX + 24)
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#define PPA_SERV_HAL_SETUP_SEC_RESVD_REGION (PPA_HAL_SERVICES_START_INDEX + 25)
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#define PPA_SERV_HAL_SETUP_EMIF_FW_REGION (PPA_HAL_SERVICES_START_INDEX + 26)
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#define PPA_SERV_HAL_LOCK_EMIF_FW (PPA_HAL_SERVICES_START_INDEX + 27)
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/* Offset of header size if image is signed as ISW */
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#define HEADER_SIZE_OFFSET (0x6D)
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int tee_loaded = 0;
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/* Argument for PPA_SERV_HAL_TEE_LOAD_MASTER */
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struct ppa_tee_load_info {
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u32 tee_sec_mem_start; /* Physical start address reserved for TEE */
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u32 tee_sec_mem_size; /* Size of the memory reserved for TEE */
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u32 tee_cert_start; /* Address where signed TEE binary is loaded */
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u32 tee_cert_size; /* Size of TEE certificate (signed binary) */
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u32 tee_jump_addr; /* Address to jump to start TEE execution */
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u32 tee_arg0; /* argument to TEE jump function, in r0 */
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};
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static uint32_t secure_rom_call_args[5] __aligned(ARCH_DMA_MINALIGN);
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u32 secure_rom_call(u32 service, u32 proc_id, u32 flag, ...)
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{
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int i;
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u32 num_args;
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va_list ap;
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va_start(ap, flag);
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num_args = va_arg(ap, u32);
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if (num_args > 4) {
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va_end(ap);
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return 1;
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}
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/* Copy args to aligned args structure */
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for (i = 0; i < num_args; i++)
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secure_rom_call_args[i + 1] = va_arg(ap, u32);
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secure_rom_call_args[0] = num_args;
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va_end(ap);
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/* if data cache is enabled, flush the aligned args structure */
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flush_dcache_range(
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(unsigned int)&secure_rom_call_args[0],
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(unsigned int)&secure_rom_call_args[0] +
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roundup(sizeof(secure_rom_call_args), ARCH_DMA_MINALIGN));
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return omap_smc_sec(service, proc_id, flag, secure_rom_call_args);
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}
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static u32 find_sig_start(char *image, size_t size)
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{
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char *image_end = image + size;
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char *sig_start_magic = "CERT_";
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int magic_str_len = strlen(sig_start_magic);
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char *ch;
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while (--image_end > image) {
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if (*image_end == '_') {
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ch = image_end - magic_str_len + 1;
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if (!strncmp(ch, sig_start_magic, magic_str_len))
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return (u32)ch;
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}
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}
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return 0;
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}
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int secure_boot_verify_image(void **image, size_t *size)
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{
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int result = 1;
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u32 cert_addr, sig_addr;
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size_t cert_size;
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/* Perform cache writeback on input buffer */
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flush_dcache_range(
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rounddown((u32)*image, ARCH_DMA_MINALIGN),
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roundup((u32)*image + *size, ARCH_DMA_MINALIGN));
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cert_addr = (uint32_t)*image;
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sig_addr = find_sig_start((char *)*image, *size);
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if (sig_addr == 0) {
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printf("No signature found in image!\n");
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result = 1;
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goto auth_exit;
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}
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*size = sig_addr - cert_addr; /* Subtract out the signature size */
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/* Subtract header if present */
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if (strncmp((char *)sig_addr, "CERT_ISW_", 9) == 0)
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*size = ((u32 *)*image)[HEADER_SIZE_OFFSET];
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cert_size = *size;
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/* Check if image load address is 32-bit aligned */
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if (!IS_ALIGNED(cert_addr, 4)) {
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printf("Image is not 4-byte aligned!\n");
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result = 1;
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goto auth_exit;
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}
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/* Image size also should be multiple of 4 */
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if (!IS_ALIGNED(cert_size, 4)) {
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printf("Image size is not 4-byte aligned!\n");
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result = 1;
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goto auth_exit;
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}
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/* Call ROM HAL API to verify certificate signature */
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debug("%s: load_addr = %x, size = %x, sig_addr = %x\n", __func__,
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cert_addr, cert_size, sig_addr);
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result = secure_rom_call(
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API_HAL_KM_VERIFYCERTIFICATESIGNATURE_INDEX, 0, 0,
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4, cert_addr, cert_size, sig_addr, 0xFFFFFFFF);
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/* Perform cache writeback on output buffer */
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flush_dcache_range(
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rounddown((u32)*image, ARCH_DMA_MINALIGN),
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roundup((u32)*image + *size, ARCH_DMA_MINALIGN));
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auth_exit:
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if (result != 0) {
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printf("Authentication failed!\n");
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printf("Return Value = %08X\n", result);
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hang();
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}
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/*
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* Output notification of successful authentication as well the name of
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* the signing certificate used to re-assure the user that the secure
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* code is being processed as expected. However suppress any such log
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* output in case of building for SPL and booting via YMODEM. This is
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* done to avoid disturbing the YMODEM serial protocol transactions.
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*/
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if (!(IS_ENABLED(CONFIG_SPL_BUILD) &&
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IS_ENABLED(CONFIG_SPL_YMODEM_SUPPORT) &&
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spl_boot_device() == BOOT_DEVICE_UART))
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printf("Authentication passed: %s\n", (char *)sig_addr);
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return result;
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}
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u32 get_sec_mem_start(void)
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{
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u32 sec_mem_start = CONFIG_TI_SECURE_EMIF_REGION_START;
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u32 sec_mem_size = CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE;
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/*
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* Total reserved region is all contiguous with protected
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* region coming first, followed by the non-secure region.
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* If 0x0 start address is given, we simply put the reserved
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* region at the end of the external DRAM.
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*/
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if (sec_mem_start == 0)
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sec_mem_start =
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(CONFIG_SYS_SDRAM_BASE + (
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#if defined(CONFIG_OMAP54XX)
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omap_sdram_size()
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#else
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get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_MAX_RAM_BANK_SIZE)
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#endif
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- sec_mem_size));
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return sec_mem_start;
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}
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int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr,
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uint32_t size, uint32_t access_perm,
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uint32_t initiator_perm)
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{
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int result = 1;
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/*
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* Call PPA HAL API to do any other general firewall
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* configuration for regions 1-6 of the EMIF firewall.
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*/
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debug("%s: regionNum = %x, startAddr = %x, size = %x", __func__,
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region_num, start_addr, size);
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result = secure_rom_call(
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PPA_SERV_HAL_SETUP_EMIF_FW_REGION, 0, 0, 4,
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(start_addr & 0xFFFFFFF0) | (region_num & 0x0F),
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size, access_perm, initiator_perm);
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if (result != 0) {
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puts("Secure EMIF Firewall Setup failed!\n");
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debug("Return Value = %x\n", result);
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}
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return result;
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}
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#if (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE < \
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CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE)
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#error "TI Secure EMIF: Protected size cannot be larger than total size."
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#endif
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int secure_emif_reserve(void)
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{
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int result = 1;
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u32 sec_mem_start = get_sec_mem_start();
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u32 sec_prot_size = CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE;
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/* If there is no protected region, there is no reservation to make */
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if (sec_prot_size == 0)
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return 0;
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/*
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* Call PPA HAL API to reserve a chunk of EMIF SDRAM
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* for secure world use. This region should be carved out
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* from use by any public code. EMIF firewall region 7
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* will be used to protect this block of memory.
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*/
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result = secure_rom_call(
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PPA_SERV_HAL_SETUP_SEC_RESVD_REGION,
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0, 0, 2, sec_mem_start, sec_prot_size);
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if (result != 0) {
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puts("SDRAM Firewall: Secure memory reservation failed!\n");
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debug("Return Value = %x\n", result);
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}
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return result;
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}
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int secure_emif_firewall_lock(void)
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{
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int result = 1;
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/*
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* Call PPA HAL API to lock the EMIF firewall configurations.
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* After this API is called, none of the PPA HAL APIs for
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* configuring the EMIF firewalls will be usable again (that
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* is, calls to those APIs will return failure and have no
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* effect).
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*/
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result = secure_rom_call(
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PPA_SERV_HAL_LOCK_EMIF_FW,
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0, 0, 0);
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if (result != 0) {
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puts("Secure EMIF Firewall Lock failed!\n");
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debug("Return Value = %x\n", result);
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}
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return result;
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}
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static struct ppa_tee_load_info tee_info __aligned(ARCH_DMA_MINALIGN);
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int secure_tee_install(u32 addr)
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{
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struct optee_header *hdr;
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void *loadptr;
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u32 tee_file_size;
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u32 sec_mem_start = get_sec_mem_start();
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const u32 size = CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE;
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u32 ret;
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/* If there is no protected region, there is no place to put the TEE */
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if (size == 0) {
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printf("Error loading TEE, no protected memory region available\n");
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return -ENOBUFS;
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}
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hdr = (struct optee_header *)map_sysmem(addr, sizeof(struct optee_header));
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/* 280 bytes = size of signature */
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tee_file_size = hdr->init_size + hdr->paged_size +
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sizeof(struct optee_header) + 280;
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if ((hdr->magic != OPTEE_MAGIC) ||
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(hdr->version != OPTEE_VERSION) ||
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(tee_file_size > size)) {
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printf("Error in TEE header. Check firewall and TEE sizes\n");
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unmap_sysmem(hdr);
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return CMD_RET_FAILURE;
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}
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tee_info.tee_sec_mem_start = sec_mem_start;
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tee_info.tee_sec_mem_size = size;
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tee_info.tee_jump_addr = hdr->init_load_addr_lo;
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tee_info.tee_cert_start = addr;
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tee_info.tee_cert_size = tee_file_size;
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tee_info.tee_arg0 = hdr->init_size + tee_info.tee_jump_addr;
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unmap_sysmem(hdr);
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loadptr = map_sysmem(addr, tee_file_size);
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debug("tee_info.tee_sec_mem_start= %08X\n", tee_info.tee_sec_mem_start);
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debug("tee_info.tee_sec_mem_size = %08X\n", tee_info.tee_sec_mem_size);
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debug("tee_info.tee_jump_addr = %08X\n", tee_info.tee_jump_addr);
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debug("tee_info.tee_cert_start = %08X\n", tee_info.tee_cert_start);
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debug("tee_info.tee_cert_size = %08X\n", tee_info.tee_cert_size);
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debug("tee_info.tee_arg0 = %08X\n", tee_info.tee_arg0);
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debug("tee_file_size = %d\n", tee_file_size);
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#if !defined(CONFIG_SYS_DCACHE_OFF)
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flush_dcache_range(
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rounddown((u32)loadptr, ARCH_DMA_MINALIGN),
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roundup((u32)loadptr + tee_file_size, ARCH_DMA_MINALIGN));
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flush_dcache_range((u32)&tee_info, (u32)&tee_info +
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roundup(sizeof(tee_info), ARCH_DMA_MINALIGN));
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#endif
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unmap_sysmem(loadptr);
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ret = secure_rom_call(PPA_SERV_HAL_TEE_LOAD_MASTER, 0, 0, 1, &tee_info);
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if (ret) {
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printf("TEE_LOAD_MASTER Failed\n");
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return ret;
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}
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printf("TEE_LOAD_MASTER Done\n");
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#if defined(CONFIG_OMAP54XX)
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if (!is_dra72x()) {
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u32 *smc_cpu1_params;
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/* Reuse the tee_info buffer for SMC params */
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smc_cpu1_params = (u32 *)&tee_info;
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smc_cpu1_params[0] = 0;
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#if !defined(CONFIG_SYS_DCACHE_OFF)
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flush_dcache_range((u32)smc_cpu1_params, (u32)smc_cpu1_params +
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roundup(sizeof(u32), ARCH_DMA_MINALIGN));
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#endif
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ret = omap_smc_sec_cpu1(PPA_SERV_HAL_TEE_LOAD_SLAVE, 0, 0,
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smc_cpu1_params);
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if (ret) {
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printf("TEE_LOAD_SLAVE Failed\n");
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return ret;
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}
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printf("TEE_LOAD_SLAVE Done\n");
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}
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#endif
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tee_loaded = 1;
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return 0;
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}
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