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In order for noncached_init() to operate correctly, SoCs must set up a custom page table with fine-grained (2MiB) sections, which can be configured from noncached_init(). This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There are some other reasons for the duplication there though, such as enabling icache early, and enabling dcaching earlier with a different configuration. This change makes mmu_setup() a weak implementation, so that the MMU setup code can be replaced without having to duplicate other code that calls it. Signed-off-by: Stephen Warren <swarren@nvidia.com> |
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.. | ||
fsl-layerscape | ||
hisilicon | ||
zynqmp | ||
cache.S | ||
cache_v8.c | ||
config.mk | ||
cpu.c | ||
exceptions.S | ||
generic_timer.c | ||
Kconfig | ||
Makefile | ||
start.S | ||
tlb.S | ||
transition.S | ||
u-boot-spl.lds | ||
u-boot.lds |