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0cc47a8ead
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2 Linux commit details about the sun7i-a20* sync: "ARM: dts: sun7i: bananapi: Add GPIO banks regulators" (sha1: 09c6572290f018d73ec2e812e28bada34d41815f) Here are U-Boot specific dts changes. - s/uart0_pins_a/uart0_pb_pins for sun7i-a20-ainol-aw1.dts sun7i-a20-m5.dts sun7i-a20-primo73.dts sun7i-a20-yones-toptech-bd1078.dts sunxi-itead-core-common.dtsi - s/gmac_pins_mii_a/gmac_rgmii_pins for sun7i-a20-m5.dts - drop i2c0, i2c1 pins from sunxi-itead-core-common.dtsi - drop mmc0 pins from sun7i-a20-primo73.dts Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
35 lines
681 B
Text
35 lines
681 B
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree Source for A20-Olimex-SOM-EVB-eMMC Board
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*
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* Copyright (C) 2018 Olimex Ltd.
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* Author: Stefan Mavrodiev <stefan@olimex.com>
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*/
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/dts-v1/;
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#include "sun7i-a20-olimex-som-evb.dts"
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/ {
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model = "Olimex A20-Olimex-SOM-EVB-eMMC";
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compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
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mmc2_pwrseq: mmc2_pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
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};
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};
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&mmc2 {
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vmmc-supply = <®_vcc3v3>;
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mmc-pwrseq = <&mmc2_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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emmc: emmc@0 {
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reg = <0>;
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compatible = "mmc-card";
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broken-hpi;
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};
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};
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