u-boot/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt
Simon Glass 74749f1e84 x86: Add a generic Intel pinctrl driver
Recent Intel SoCs share a pinctrl mechanism with many common elements. Add
an implementation of this core functionality, allowing SoC-specific
drivers to avoid adding common code.

As well as a pinctrl driver this provides a GPIO driver based on the same
code.

Once other SoCs use this driver we may consider moving more properties to
the device tree (e.g. the community info and pad definitions).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:25 +08:00

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* Intel Apollo Lake pin controller
The Apollo Lake (APL) pin controller is used to select the function of a pin
and to configure it.
Required properties:
- compatible: "intel,apl-pinctrl"
- intel,p2sb-port-id: Port ID number within the parent P2SB
- reg: PCI address of the controller
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices.
Optional subnodes:
GPIO nodes may be added as children of the pinctrl nodes. See intel,apl-gpio
for the binding.
Example:
...
{
p2sb: p2sb@d,0 {
reg = <0x02006810 0 0 0 0>;
compatible = "intel,apl-p2sb";
early-regs = <IOMAP_P2SB_BAR 0x100000>;
n {
compatible = "intel,apl-pinctrl";
intel,p2sb-port-id = <PID_GPIO_N>;
gpio_n: gpio-n {
compatible = "intel,apl-gpio";
#gpio-cells = <2>;
};
};
};
};
...