mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-07 05:34:28 +00:00
c793dbdb90
It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
88 lines
1.9 KiB
C
88 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 Google LLC
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <handoff.h>
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#include <spl.h>
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#include <acpi/acpi_s3.h>
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#include <asm/arch/cpu.h>
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#include <asm/fsp/fsp_support.h>
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#include <asm/fsp2/fsp_api.h>
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#include <asm/fsp2/fsp_internal.h>
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#include <linux/sizes.h>
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int dram_init(void)
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{
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int ret;
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if (!ll_boot_init()) {
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/* Use a small and safe amount of 1GB */
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gd->ram_size = SZ_1G;
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return 0;
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}
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if (spl_phase() == PHASE_SPL) {
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#ifdef CONFIG_HAVE_ACPI_RESUME
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bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
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#else
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bool s3wake = false;
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#endif
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ret = fsp_memory_init(s3wake,
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IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH));
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if (ret) {
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debug("Memory init failed (err=%x)\n", ret);
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return ret;
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}
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/* The FSP has already set up DRAM, so grab the info we need */
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ret = fsp_scan_for_ram_size();
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if (ret)
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return ret;
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#ifdef CONFIG_ENABLE_MRC_CACHE
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gd->arch.mrc[MRC_TYPE_NORMAL].buf =
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fsp_get_nvs_data(gd->arch.hob_list,
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&gd->arch.mrc[MRC_TYPE_NORMAL].len);
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gd->arch.mrc[MRC_TYPE_VAR].buf =
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fsp_get_var_nvs_data(gd->arch.hob_list,
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&gd->arch.mrc[MRC_TYPE_VAR].len);
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log_debug("normal %x, var %x\n",
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gd->arch.mrc[MRC_TYPE_NORMAL].len,
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gd->arch.mrc[MRC_TYPE_VAR].len);
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#endif
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} else {
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#if CONFIG_IS_ENABLED(HANDOFF)
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struct spl_handoff *ho = gd->spl_handoff;
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if (!ho) {
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debug("No SPL handoff found\n");
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return -ESTRPIPE;
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}
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gd->ram_size = ho->ram_size;
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handoff_load_dram_banks(ho);
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#endif
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ret = arch_fsps_preinit();
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if (ret)
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return log_msg_ret("fsp_s_preinit", ret);
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}
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return 0;
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}
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ulong board_get_usable_ram_top(ulong total_size)
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{
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if (!ll_boot_init())
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return gd->ram_size;
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#if CONFIG_IS_ENABLED(HANDOFF)
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struct spl_handoff *ho = gd->spl_handoff;
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return ho->arch.usable_ram_top;
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#endif
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return gd->ram_top;
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}
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