u-boot/arch/riscv
Jagan Teki 286bcdb40f sifive: fu540: Enable spi-nor flash support
HiFive Unleashed A00 support is25wp256 spi-nor flash,
So enable the same and add test result log for future
reference.

Tested on SiFive FU540 board.

Thanks to Sagar for various use cases and tests.

[QUAD mode in dt with spi-tx-bus-width: <4>]
 pp opcode      = 0x34 [QUAD MODE]
 read opcode  = 0x6c  [QUAD MODE]
 erase opcode = 0x21

SPI-NOR:
1. erase entire flash: Pass
2. write entire flash: Pass
3. read entire flash: Pass
4. cmp 32MiB read back data: Pass
5. MMC: Booted Linux and dtb from mmc

[SPI MODE in dt with spi-tx-bus-width: <1>]
pp opcode     = 0x12 [SPI MODE]
read opcode  = 0xc   [SPI MODE]
erase opcode = 0x21

SPI-NOR:
1. erase entire flash: Pass
2. write entire flash: Pass
3. read entire flash: Pass
4. cmp 32MiB read back data: Pass
5. MMC: Booted Linux and dtb from mmc

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30 22:34:20 +05:30
..
cpu riscv: Provide a mechanism to fix DT for reserved memory 2020-04-23 10:14:16 +08:00
dts sifive: fu540: Enable spi-nor flash support 2020-04-30 22:34:20 +05:30
include/asm riscv: Provide a mechanism to fix DT for reserved memory 2020-04-23 10:14:16 +08:00
lib riscv: Move all fdt fixups together 2020-04-23 10:14:16 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: Make SBI v0.2 the default SBI version 2020-04-23 10:14:06 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00