mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
73be5636f4
Add DT binding for GT64120 and MSC01 PCI controllers. Only GT64120 is enabled by default to support Qemu. The MSC01 node will be dynamically enabled by Malta board code dependent on the plugged core card. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
60 lines
1.2 KiB
Text
60 lines
1.2 KiB
Text
/dts-v1/;
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/memreserve/ 0x00000000 0x00001000; /* Exception vectors */
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/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mti,malta";
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chosen {
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stdout-path = &uart0;
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};
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isa@0 {
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compatible = "isa";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0 0x1000>;
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uart0: serial@3f8 {
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compatible = "ns16550a";
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reg = <1 0x3f8 0x40>;
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reg-shift = <0>;
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clock-frequency = <1843200>;
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u-boot,dm-pre-reloc;
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};
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};
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pci0@1bd00000 {
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compatible = "mips,pci-msc01";
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device_type = "pci";
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reg = <0x1bd00000 0x2000>;
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0x0>;
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ranges = <0x01000000 0 0x00000000 0x00000000 0 0x800000 /* I/O */
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0x02000000 0 0x10000000 0xb0000000 0 0x10000000 /* MEM */>;
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status = "disabled";
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};
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pci0@1be00000 {
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compatible = "marvell,pci-gt64120";
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device_type = "pci";
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reg = <0x1be00000 0x2000>;
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0x0>;
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ranges = <0x01000000 0 0x00000000 0x00000000 0 0x20000 /* I/O */
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0x02000000 0 0x10000000 0x10000000 0 0x8000000 /* MEM */>;
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status = "okay";
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};
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};
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