mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-01 00:49:43 +00:00
76880b08c4
The mt7620_rfb board supports integrated 10/100M PHYs plus two external giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB. The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a 16MB SPI-NOR flash. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
58 lines
1.6 KiB
Text
58 lines
1.6 KiB
Text
CONFIG_MIPS=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x1000
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CONFIG_ENV_OFFSET=0x30000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
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CONFIG_SPL=y
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CONFIG_DEBUG_UART_BASE=0xb0000c00
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CONFIG_DEBUG_UART_CLOCK=40000000
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CONFIG_ARCH_MTMIPS=y
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CONFIG_BOARD_MT7620_MT7530_RFB=y
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CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb"
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CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
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CONFIG_MIPS_BOOT_FDT=y
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_NOR_SUPPORT=y
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# CONFIG_CMD_ELF is not set
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_CRC32 is not set
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# CONFIG_CMD_DM is not set
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_SPI=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_MII=y
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# CONFIG_CMD_MDIO is not set
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# CONFIG_PARTITIONS is not set
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupts resets reset-names"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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# CONFIG_SIMPLE_BUS is not set
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# CONFIG_SPL_SIMPLE_BUS is not set
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CONFIG_GPIO_HOG=y
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# CONFIG_INPUT is not set
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_EON=y
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_SPI_FLASH_ISSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_XMC=y
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CONFIG_MT7620_ETH=y
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CONFIG_SPECIFY_CONSOLE_INDEX=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SPI=y
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CONFIG_MT7620_SPI=y
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CONFIG_LZMA=y
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CONFIG_SPL_LZMA=y
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