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Generic system controller (SC) covers connection defined by specification but different boards have different i2c devices. That's why describe i2c devices available on multiple boards. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ca1826b8b58981111229a94527818cc5a191ca9a.1695808407.git.michal.simek@amd.com
460 lines
11 KiB
Text
460 lines
11 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP VN-P-B2197-00 (Tenzing2)
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*
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* Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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/dts-v1/;
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/plugin/;
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&{/} {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "xlnx,zynqmp-sc-vn-p-b2197-revA",
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"xlnx,zynqmp-sc-vn-p-b2197", "xlnx,zynqmp";
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aliases {
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nvmem1 = &x_prc_eeprom;
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};
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ina226-u1700 {
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compatible = "iio-hwmon";
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io-channels = <&vcc_ram_ina 0>, <&vcc_ram_ina 1>, <&vcc_ram_ina 2>;
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};
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ina226-u1732 {
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compatible = "iio-hwmon";
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io-channels = <&vcc_lpd_ina 0>, <&vcc_lpd_ina 1>, <&vcc_lpd_ina 2>;
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};
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ina226-u1733 {
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compatible = "iio-hwmon";
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io-channels = <&vccaux_ina 0>, <&vccaux_ina 1>, <&vccaux_ina 2>;
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};
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ina226-u1736 {
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compatible = "iio-hwmon";
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io-channels = <&vccaux_lpd_ina 0>, <&vccaux_lpd_ina 1>, <&vccaux_lpd_ina 2>;
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};
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ina226-u1737 {
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compatible = "iio-hwmon";
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io-channels = <&vcco_500_ina 0>, <&vcco_500_ina 1>, <&vcco_500_ina 2>;
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};
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ina226-u1739 {
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compatible = "iio-hwmon";
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io-channels = <&vcco_501_ina 0>, <&vcco_501_ina 1>, <&vcco_501_ina 2>;
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};
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ina226-u1741 {
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compatible = "iio-hwmon";
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io-channels = <&vcco_502_ina 0>, <&vcco_502_ina 1>, <&vcco_502_ina 2>;
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};
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ina226-u1743 {
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compatible = "iio-hwmon";
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io-channels = <&vcco_503_ina 0>, <&vcco_503_ina 1>, <&vcco_503_ina 2>;
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};
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ina226-u1745 {
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compatible = "iio-hwmon";
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io-channels = <&vcco_700_ina 0>, <&vcco_700_ina 1>, <&vcco_700_ina 2>;
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};
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ina226-u1747 {
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compatible = "iio-hwmon";
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io-channels = <&vcco_706_ina 0>, <&vcco_706_ina 1>, <&vcco_706_ina 2>;
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};
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ina226-u1750 {
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compatible = "iio-hwmon";
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io-channels = <>yp_avcc_ina 0>, <>yp_avcc_ina 1>, <>yp_avcc_ina 2>;
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};
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ina226-u1752 {
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compatible = "iio-hwmon";
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io-channels = <>yp_avtt_ina 0>, <>yp_avtt_ina 1>, <>yp_avtt_ina 2>;
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};
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ina226-u1754 {
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compatible = "iio-hwmon";
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io-channels = <>yp_avccaux_ina 0>, <>yp_avccaux_ina 1>, <>yp_avccaux_ina 2>;
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};
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ina226-u1756 {
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compatible = "iio-hwmon";
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io-channels = <>m_avcc_ina 0>, <>m_avcc_ina 1>, <>m_avcc_ina 2>;
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};
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ina226-u1758 {
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compatible = "iio-hwmon";
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io-channels = <>m_avtt_ina 0>, <>m_avtt_ina 1>, <>m_avtt_ina 2>;
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};
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ina226-u1760 {
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compatible = "iio-hwmon";
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io-channels = <>m_avccaux_ina 0>, <>m_avccaux_ina 1>, <>m_avccaux_ina 2>;
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};
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/* sc_vpk180_axi_iic_0_0: i2c@80050000 - UNUSED NOW */ /* SI5332 */
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/* Connect to J212G pin G29/G30 - sysmon connector */
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/* sc_vpk180_axi_iic_1_0: i2c@80060000 */ /* SYSMON */
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/* FIXME Fan control via u1702 - max6643 and mux via J1703 - not SW controllable - via EMIO */
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};
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&i2c1 {
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#address-cells = <1>;
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#size-cells = <0>;
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/* u97 eeprom at 0x54 described in sc-revB - WP protection via BOARD_EEPROM_WP - J1801 */
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/* DC/SE eeprom at 0x52 */
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x_prc_eeprom: eeprom@52 { /* u4 - DC card identification - possible WP */
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compatible = "atmel,24c02";
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reg = <0x52>;
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bootph-all;
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};
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x_prc_tca9534: gpio@22 { /* u5 */
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compatible = "nxp,pca9534";
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reg = <0x22>;
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gpio-controller; /* IRQ not connected */
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#gpio-cells = <2>;
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gpio-line-names = "xprc_sw_1", "xprc_sw_2", "xprc_sw_3", "xprc_sw_4",
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"", "", "", "";
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gtr-sel0 {
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gpio-hog;
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gpios = <0 0>;
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input; /* FIXME add meaning */
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line-name = "xprc_sw_1";
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};
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gtr-sel1 {
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gpio-hog;
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gpios = <1 0>;
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input; /* FIXME add meaning */
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line-name = "xprc_sw_1";
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};
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gtr-sel2 {
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gpio-hog;
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gpios = <2 0>;
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input; /* FIXME add meaning */
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line-name = "xprc_sw_1";
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};
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gtr-sel3 {
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gpio-hog;
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gpios = <3 0>;
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input; /* FIXME add meaning */
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line-name = "xprc_sw_1";
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};
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};
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/* FMC eeproms at 0x50/0x51 */
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/* via j3/j5 to 0x68 to u32/9FGV1006C
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/* i2c_main_1 - u147 - j157 - disable translation, add 8 */
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/* J1 - OE for u43@55 + 8 - 161,132813MHz - QSFP56G_0 */
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qsfp56g_0_clk: clock-controller@5d {
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compatible = "renesas,proxo-xp";
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reg = <0x5d>;
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#clock-cells = <0>;
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clock-output-names = "qsfp56g_0_clk";
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};
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/* J2 - OE for u41@57 + 8 - 322,265625MHz - QSFP56G_1 */
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qsfp56g_1_clk: clock-controller@5f {
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compatible = "renesas,proxo-xp";
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reg = <0x5f>;
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#clock-cells = <0>;
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clock-output-names = "qsfp56g_1_clk";
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};
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/* J81 - OE for u115@50 + 8 - 320MHz - LPDDR5_C0 */
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lpddr5_c0_clk: clock-controller@58 {
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compatible = "renesas,proxo-xp";
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reg = <0x58>;
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#clock-cells = <0>;
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clock-output-names = "lpddr5_c0_clk";
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};
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/* i2c_main_2 - u148 - j122 - disable translation, add 9 */
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/* J112 - OE for u63@50 + 9 - 320MHz - LPDDR5_C2 */
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lpddr5_c2_clk: clock-controller@59 {
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compatible = "renesas,proxo-xp";
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reg = <0x59>;
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#clock-cells = <0>;
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clock-output-names = "lpddr5_c2_clk";
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};
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/* i2c_main_3 - u149 - j154 - disable translation, add 6 */
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/* J78 - OE for u116@50 + 6 - 320MHz - DDR5_UDIMM */
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ddr5_udimm_clk: clock-controller@56 {
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compatible = "renesas,proxo-xp";
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reg = <0x56>;
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#clock-cells = <0>;
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clock-output-names = "ddr5_udimm_clk";
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};
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/* i2c_main_4 - u150 - j146 - disable translation, add 5 */
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/* J107 - OE for u39@50 + 5 - 33,3333MHz - PS_REFCLK */
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ps_refclk: clock-controller@55 {
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compatible = "renesas,proxo-xp";
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reg = <0x55>;
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#clock-cells = <0>;
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clock-output-names = "ps_refclk";
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};
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/* i2c_main_5 - u1782 - j1798 - disable translation, add 7 */
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/* J77 - OE for u1783@50 + 7 - 320MHz - DDR4 */
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ddr4_clk: clock-controller@57 {
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compatible = "renesas,proxo-xp";
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reg = <0x57>;
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#clock-cells = <0>;
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clock-output-names = "ddr4_clk";
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};
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/* LTC4316 - not wired XORH/XORL - FIXME */
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/* J3 gate - FIXME should be connected for SW handling */
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/* i2c_main_1 bus */
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i2c1_u32: clock-controller@68 {
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compatible = "renesas,9fgv1006";
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reg = <0x68>;
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};
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/* J71 - selection to LP_I2C_SCL_J or LP_I2C_PMC_SCL_J */
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/* J70 - selection to LP_I2C_SDA_J or LP_I2C_PMC_SDA_J */
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/* this should be SW controlable too */
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};
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&i2c0 {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Via j11/j12 can also go to u17/IML3112 - 1:2 multiplexer - also accessed from Versal NET */
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/* Connection DDR5_UDIMM - SPD can be from 0x50-0x57 */
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/* FIXME gpio should handle SYSCTLR_PMBUS_ALERT and also INA226_PMBUS_ALERT */
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/* ina226_pmbus - J55 - disable INA226_PMBUS */
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vcc_ram_ina: power-monitor@40 { /* u1700 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x40>;
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shunt-resistor = <1000>; /* R1996 */
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};
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vcc_lpd_ina: power-monitor@41 { /* u1732 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x41>;
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shunt-resistor = <1000>; /* R2017 */
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};
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vccaux_ina: power-monitor@42 { /* u1733 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x42>;
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shunt-resistor = <1000>; /* R2037 */
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};
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vccaux_lpd_ina: power-monitor@43 { /* u1736 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x43>;
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shunt-resistor = <1000>; /* R2057 */
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};
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vcco_500_ina: power-monitor@44 { /* u1737 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x44>;
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shunt-resistor = <1000>; /* R2069 */
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};
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vcco_501_ina: power-monitor@45 { /* u1739 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x45>;
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shunt-resistor = <1000>; /* R2089 */
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};
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vcco_502_ina: power-monitor@46 { /* u1741 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x46>;
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shunt-resistor = <1000>; /* R2108 */
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};
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vcco_503_ina: power-monitor@47 { /* u1743 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x47>;
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shunt-resistor = <1000>; /* R2127 */
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};
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vcco_700_ina: power-monitor@48 { /* u1745 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x48>;
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shunt-resistor = <1000>; /* R2154 */
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};
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vcco_706_ina: power-monitor@49 { /* u1747 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x49>;
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shunt-resistor = <1000>; /* R2175 */
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};
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gtyp_avcc_ina: power-monitor@4a { /* u1750 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x4a>;
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shunt-resistor = <1000>; /* R2195 */
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};
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gtyp_avtt_ina: power-monitor@4b { /* u1752 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x4b>;
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shunt-resistor = <1000>; /* R2215 */
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};
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gtyp_avccaux_ina: power-monitor@4c { /* u1754 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x4c>;
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shunt-resistor = <5000>; /* R2235 */
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};
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gtm_avcc_ina: power-monitor@4d { /* u1756 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x4d>;
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shunt-resistor = <1000>; /* R2256 */
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};
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gtm_avtt_ina: power-monitor@4e { /* u1758 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x4e>;
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shunt-resistor = <1000>; /* R2276 */
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};
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gtm_avccaux_ina: power-monitor@4f { /* u1760 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x4f>;
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shunt-resistor = <5000>; /* R2296 */
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};
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/* pmbus - J50 - disable main PMBUS - also going to j132 */
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vcc_ram: regulator@a { /* u1730 */
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compatible = "ti,tps544b25";
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reg = <0xa>;
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};
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vcc_lpd: regulator@b { /* u1731 */
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compatible = "ti,tps544b25";
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reg = <0xb>;
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};
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vccaux: regulator@1a { /* u1734 */
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compatible = "ti,tps544b25";
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reg = <0x1a>;
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};
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vcco_503: regulator@12 { /* u1744 */
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compatible = "ti,tps546b24a";
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reg = <0x12>;
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};
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vcco_700: regulator@16 { /* u1746 */
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compatible = "ti,tps544b25";
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reg = <0x16>;
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};
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vcco_706: regulator@17 { /* u1748 */
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compatible = "ti,tps544b25";
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reg = <0x17>;
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};
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gtm_avcc: regulator@23 { /* u1755 */
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compatible = "ti,tps544b25";
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reg = <0x23>;
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};
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gtm_avtt: regulator@24 { /* u1757 */
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compatible = "ti,tps544b25";
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reg = <0x24>;
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};
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gtm_avccaux: regulator@25 { /* u1759 */
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compatible = "ti,tps544b25";
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reg = <0x25>;
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};
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util_1v8: regulator@15 { /* u1765 */
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compatible = "ti,tps544b25";
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reg = <0x15>;
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};
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ucd90320: power-sequencer@73 { /* u1768 */
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compatible = "ti,ucd90320";
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reg = <0x73>;
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};
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/* EXT_PMBUS main - J10 - disable extended PMBUS */
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vccint: tps53681@60 { /* u1712 - J1770 reset jumper */
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compatible = "ti,tps53681", "ti,tps53679";
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reg = <0x60>;
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/* vccint, vcc_cpm5n */
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};
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vcc_io_soc: tps53681@61 { /* u1721 - J1772 reset jumper */
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compatible = "ti,tps53681", "ti,tps53679";
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reg = <0x61>;
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/* vcc_io_soc, vcc_fpd */
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};
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vccaux_lpd: regulator@d { /* u1735 */
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compatible = "ti,tps544b25";
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reg = <0xd>;
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};
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vcco_500: regulator@13 { /* u1738 */
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compatible = "ti,tps546b24a";
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reg = <0x13>;
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};
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vcco_501: regulator@10 { /* u1740 */
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compatible = "ti,tps546b24a";
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reg = <0x10>;
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};
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vcco_502: regulator@11 { /* u1742 */
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compatible = "ti,tps546b24a";
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reg = <0x11>;
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};
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gtyp_avcc: regulator@20 { /* u1749 */
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compatible = "ti,tps544b25";
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reg = <0x20>;
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};
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gtyp_avtt: regulator@21 { /* u1751 */
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compatible = "ti,tps544b25";
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reg = <0x21>;
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};
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gtyp_avccaux: regulator@22 { /* u1753 */
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compatible = "ti,tps544b25";
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reg = <0x22>;
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};
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lp5_vdd1_1v8: regulator@e { /* u1761 - FIXME no ina226 */
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compatible = "ti,tps544b25";
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reg = <0xe>;
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};
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lp5_vdd2_1v05: regulator@f { /* u1762 - FIXME no ina226 */
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compatible = "ti,tps544b25";
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reg = <0xf>;
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};
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lp5_vddq_0v5: regulator@14 { /* u1763 - FIXME no ina226 */
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compatible = "ti,tps546b24a";
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reg = <0x14>;
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};
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};
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