mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 10:30:32 +00:00
f984d3889c
Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
1104 lines
19 KiB
Text
1104 lines
19 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for common parts of Salvator-X board variants
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*
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* Copyright (C) 2015-2016 Renesas Electronics Corp.
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*/
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/*
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* SSI-AK4613
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*
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* This command is required when Playback/Capture
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*
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* amixer set "DVC Out" 100%
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* amixer set "DVC In" 100%
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*
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* You can use Mute
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*
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* amixer set "DVC Out Mute" on
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* amixer set "DVC In Mute" on
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*
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* You can use Volume Ramp
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*
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* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
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* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
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* amixer set "DVC Out Ramp" on
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* aplay xxx.wav &
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* amixer set "DVC Out" 80% // Volume Down
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* amixer set "DVC Out" 100% // Volume Up
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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i2c7 = &i2c_dvfs;
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serial0 = &scif2;
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serial1 = &hscif1;
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ethernet0 = &avb;
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mmc0 = &sdhi2;
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mmc1 = &sdhi0;
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mmc2 = &sdhi3;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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stdout-path = "serial0:115200n8";
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};
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audio_clkout: audio-clkout {
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/*
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* This is same as <&rcar_sound 0>
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* but needed to avoid cs2000/rcar_sound probe dead-lock
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*/
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 50000>;
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brightness-levels = <256 128 64 16 8 4 0>;
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default-brightness-level = <6>;
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power-supply = <®_12v>;
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enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
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};
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cvbs-in {
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compatible = "composite-video-connector";
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label = "CVBS IN";
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port {
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cvbs_con: endpoint {
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remote-endpoint = <&adv7482_ain7>;
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};
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};
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};
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hdmi-in {
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compatible = "hdmi-connector";
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label = "HDMI IN";
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type = "a";
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port {
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hdmi_in_con: endpoint {
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remote-endpoint = <&adv7482_hdmi>;
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};
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};
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};
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hdmi0-out {
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compatible = "hdmi-connector";
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label = "HDMI0 OUT";
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type = "a";
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port {
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hdmi0_con: endpoint {
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remote-endpoint = <&rcar_dw_hdmi0_out>;
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};
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};
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};
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hdmi1-out {
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compatible = "hdmi-connector";
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label = "HDMI1 OUT";
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type = "a";
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port {
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hdmi1_con: endpoint {
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};
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};
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&keys_pins>;
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pinctrl-names = "default";
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key-1 {
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gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_1>;
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label = "SW4-1";
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wakeup-source;
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debounce-interval = <20>;
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};
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key-2 {
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gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_2>;
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label = "SW4-2";
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wakeup-source;
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debounce-interval = <20>;
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};
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key-3 {
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gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_3>;
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label = "SW4-3";
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wakeup-source;
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debounce-interval = <20>;
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};
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key-4 {
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gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_4>;
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label = "SW4-4";
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wakeup-source;
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debounce-interval = <20>;
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};
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key-a {
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gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_A>;
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label = "TSW0";
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wakeup-source;
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debounce-interval = <20>;
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};
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key-b {
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gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_B>;
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label = "TSW1";
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wakeup-source;
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debounce-interval = <20>;
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};
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key-c {
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gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_C>;
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label = "TSW2";
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wakeup-source;
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debounce-interval = <20>;
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};
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_12v: regulator-12v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-12V";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sound_card: sound {
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compatible = "audio-graph-card";
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label = "rcar-sound";
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dais = <&rsnd_port0 /* ak4613 */
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&rsnd_port1 /* HDMI0 */
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#ifdef SOC_HAS_HDMI1
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&rsnd_port2 /* HDMI1 */
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#endif
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>;
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};
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vbus0_usb2: regulator-vbus0-usb2 {
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compatible = "regulator-fixed";
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regulator-name = "USB20_VBUS0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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vcc_sdhi3: regulator-vcc-sdhi3 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI3 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi3: regulator-vccq-sdhi3 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI3 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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vga {
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compatible = "vga-connector";
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port {
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vga_in: endpoint {
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remote-endpoint = <&adv7123_out>;
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};
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};
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};
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vga-encoder {
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compatible = "adi,adv7123";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7123_in: endpoint {
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remote-endpoint = <&du_out_rgb>;
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};
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};
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port@1 {
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reg = <1>;
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adv7123_out: endpoint {
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remote-endpoint = <&vga_in>;
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};
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};
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};
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};
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x12_clk: x12 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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/* External DU dot clocks */
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x21_clk: x21-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <33000000>;
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};
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x22_clk: x22-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <33000000>;
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};
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x23_clk: x23-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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};
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&a57_0 {
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cpu-supply = <&dvfs>;
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};
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&audio_clk_a {
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clock-frequency = <22579200>;
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy0>;
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-id0022.1622",
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"ethernet-phy-ieee802.3-c22";
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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};
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};
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&csi20 {
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status = "okay";
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ports {
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port@0 {
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csi20_in: endpoint {
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clock-lanes = <0>;
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data-lanes = <1>;
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remote-endpoint = <&adv7482_txb>;
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};
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};
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};
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};
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&csi40 {
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status = "okay";
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ports {
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port@0 {
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csi40_in: endpoint {
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clock-lanes = <0>;
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data-lanes = <1 2 3 4>;
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remote-endpoint = <&adv7482_txa>;
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};
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};
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};
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};
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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ports {
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port@0 {
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du_out_rgb: endpoint {
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remote-endpoint = <&adv7123_in>;
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};
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};
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};
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};
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&ehci0 {
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dr_mode = "otg";
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&hdmi0 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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rcar_dw_hdmi0_out: endpoint {
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remote-endpoint = <&hdmi0_con>;
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};
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};
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port@2 {
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reg = <2>;
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dw_hdmi0_snd_in: endpoint {
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remote-endpoint = <&rsnd_endpoint1>;
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};
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};
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};
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};
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#ifdef SOC_HAS_HDMI1
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&hdmi1 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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rcar_dw_hdmi1_out: endpoint {
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remote-endpoint = <&hdmi1_con>;
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};
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};
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port@2 {
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reg = <2>;
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dw_hdmi1_snd_in: endpoint {
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remote-endpoint = <&rsnd_endpoint2>;
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};
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};
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};
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};
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&hdmi1_con {
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remote-endpoint = <&rcar_dw_hdmi1_out>;
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};
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#endif /* SOC_HAS_HDMI1 */
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&hscif1 {
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pinctrl-0 = <&hscif1_pins>;
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pinctrl-names = "default";
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uart-has-rtscts;
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/* Please only enable hscif1 or scif1 */
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status = "okay";
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};
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&hsusb {
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dr_mode = "otg";
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status = "okay";
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <100000>;
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ak4613: codec@10 {
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compatible = "asahi-kasei,ak4613";
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#sound-dai-cells = <0>;
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reg = <0x10>;
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clocks = <&rcar_sound 3>;
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asahi-kasei,in1-single-end;
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asahi-kasei,in2-single-end;
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asahi-kasei,out1-single-end;
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asahi-kasei,out2-single-end;
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asahi-kasei,out3-single-end;
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asahi-kasei,out4-single-end;
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asahi-kasei,out5-single-end;
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asahi-kasei,out6-single-end;
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port {
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ak4613_endpoint: endpoint {
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remote-endpoint = <&rsnd_endpoint0>;
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};
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};
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};
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cs2000: clk_multiplier@4f {
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#clock-cells = <0>;
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compatible = "cirrus,cs2000-cp";
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reg = <0x4f>;
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clocks = <&audio_clkout>, <&x12_clk>;
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clock-names = "clk_in", "ref_clk";
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assigned-clocks = <&cs2000>;
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assigned-clock-rates = <24576000>; /* 1/1 divide */
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};
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};
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&i2c4 {
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status = "okay";
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pca9654: gpio@20 {
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compatible = "onnn,pca9654";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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video-receiver@70 {
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compatible = "adi,adv7482";
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reg = <0x70 0x71 0x72 0x73 0x74 0x75
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0x60 0x61 0x62 0x63 0x64 0x65>;
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reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
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"infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
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interrupt-parent = <&gpio6>;
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interrupt-names = "intrq1", "intrq2";
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
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<31 IRQ_TYPE_LEVEL_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@7 {
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reg = <7>;
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adv7482_ain7: endpoint {
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remote-endpoint = <&cvbs_con>;
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};
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};
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port@8 {
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reg = <8>;
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adv7482_hdmi: endpoint {
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remote-endpoint = <&hdmi_in_con>;
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};
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};
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port@a {
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reg = <10>;
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adv7482_txa: endpoint {
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clock-lanes = <0>;
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data-lanes = <1 2 3 4>;
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remote-endpoint = <&csi40_in>;
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};
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};
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port@b {
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reg = <11>;
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adv7482_txb: endpoint {
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clock-lanes = <0>;
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data-lanes = <1>;
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remote-endpoint = <&csi20_in>;
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};
|
|
};
|
|
};
|
|
};
|
|
|
|
csa_vdd: adc@7c {
|
|
compatible = "maxim,max9611";
|
|
reg = <0x7c>;
|
|
|
|
shunt-resistor-micro-ohms = <5000>;
|
|
};
|
|
|
|
csa_dvfs: adc@7f {
|
|
compatible = "maxim,max9611";
|
|
reg = <0x7f>;
|
|
|
|
shunt-resistor-micro-ohms = <5000>;
|
|
};
|
|
};
|
|
|
|
&i2c_dvfs {
|
|
status = "okay";
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
pmic: pmic@30 {
|
|
pinctrl-0 = <&irq0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
compatible = "rohm,bd9571mwv";
|
|
reg = <0x30>;
|
|
interrupt-parent = <&intc_ex>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
rohm,ddr-backup-power = <0xf>;
|
|
rohm,rstbmode-level;
|
|
|
|
regulators {
|
|
dvfs: dvfs {
|
|
regulator-name = "dvfs";
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <1030000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
eeprom@50 {
|
|
compatible = "rohm,br24t01", "atmel,24c01";
|
|
reg = <0x50>;
|
|
pagesize = <8>;
|
|
};
|
|
};
|
|
|
|
&ohci0 {
|
|
dr_mode = "otg";
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie_bus_clk {
|
|
clock-frequency = <100000000>;
|
|
};
|
|
|
|
&pciec0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pciec1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pfc {
|
|
pinctrl-0 = <&scif_clk_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
avb_pins: avb {
|
|
mux {
|
|
groups = "avb_link", "avb_mdio", "avb_mii";
|
|
function = "avb";
|
|
};
|
|
|
|
pins_mdio {
|
|
groups = "avb_mdio";
|
|
drive-strength = <24>;
|
|
};
|
|
|
|
pins_mii_tx {
|
|
pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
|
|
"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
|
|
drive-strength = <12>;
|
|
};
|
|
};
|
|
|
|
du_pins: du {
|
|
groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
|
|
function = "du";
|
|
};
|
|
|
|
hscif1_pins: hscif1 {
|
|
groups = "hscif1_data_a", "hscif1_ctrl_a";
|
|
function = "hscif1";
|
|
};
|
|
|
|
i2c2_pins: i2c2 {
|
|
groups = "i2c2_a";
|
|
function = "i2c2";
|
|
};
|
|
|
|
irq0_pins: irq0 {
|
|
groups = "intc_ex_irq0";
|
|
function = "intc_ex";
|
|
};
|
|
|
|
keys_pins: keys {
|
|
pins = "GP_5_17", "GP_5_20", "GP_5_22";
|
|
bias-pull-up;
|
|
};
|
|
|
|
pwm1_pins: pwm1 {
|
|
groups = "pwm1_a";
|
|
function = "pwm1";
|
|
};
|
|
|
|
scif1_pins: scif1 {
|
|
groups = "scif1_data_a", "scif1_ctrl";
|
|
function = "scif1";
|
|
};
|
|
|
|
scif2_pins: scif2 {
|
|
groups = "scif2_data_a";
|
|
function = "scif2";
|
|
};
|
|
|
|
scif_clk_pins: scif_clk {
|
|
groups = "scif_clk_a";
|
|
function = "scif_clk";
|
|
};
|
|
|
|
sdhi0_pins: sd0 {
|
|
groups = "sdhi0_data4", "sdhi0_ctrl";
|
|
function = "sdhi0";
|
|
power-source = <3300>;
|
|
};
|
|
|
|
sdhi0_pins_uhs: sd0_uhs {
|
|
groups = "sdhi0_data4", "sdhi0_ctrl";
|
|
function = "sdhi0";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
sdhi2_pins: sd2 {
|
|
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
|
|
function = "sdhi2";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
sdhi3_pins: sd3 {
|
|
groups = "sdhi3_data4", "sdhi3_ctrl";
|
|
function = "sdhi3";
|
|
power-source = <3300>;
|
|
};
|
|
|
|
sdhi3_pins_uhs: sd3_uhs {
|
|
groups = "sdhi3_data4", "sdhi3_ctrl";
|
|
function = "sdhi3";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
sound_pins: sound {
|
|
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
|
|
function = "ssi";
|
|
};
|
|
|
|
sound_clk_pins: sound_clk {
|
|
groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
|
|
"audio_clkout_a", "audio_clkout3_a";
|
|
function = "audio_clk";
|
|
};
|
|
|
|
usb0_pins: usb0 {
|
|
groups = "usb0";
|
|
function = "usb0";
|
|
};
|
|
|
|
usb1_pins: usb1 {
|
|
mux {
|
|
groups = "usb1";
|
|
function = "usb1";
|
|
};
|
|
|
|
ovc {
|
|
pins = "GP_6_27";
|
|
bias-pull-up;
|
|
};
|
|
|
|
pwen {
|
|
pins = "GP_6_26";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
usb30_pins: usb30 {
|
|
groups = "usb30";
|
|
function = "usb30";
|
|
};
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-0 = <&pwm1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&rcar_sound {
|
|
pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
/* audio_clkout0/1/2/3 */
|
|
#clock-cells = <1>;
|
|
clock-frequency = <12288000 11289600>;
|
|
|
|
status = "okay";
|
|
|
|
/* update <audio_clk_b> to <cs2000> */
|
|
clocks = <&cpg CPG_MOD 1005>,
|
|
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
|
|
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
|
|
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
|
|
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
|
|
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
|
|
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
|
|
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
|
|
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
|
|
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
|
|
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
|
|
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
|
|
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
|
|
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
|
|
<&audio_clk_a>, <&cs2000>,
|
|
<&audio_clk_c>,
|
|
<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
rsnd_port0: port@0 {
|
|
reg = <0>;
|
|
rsnd_endpoint0: endpoint {
|
|
remote-endpoint = <&ak4613_endpoint>;
|
|
|
|
dai-format = "left_j";
|
|
bitclock-master = <&rsnd_endpoint0>;
|
|
frame-master = <&rsnd_endpoint0>;
|
|
|
|
playback = <&ssi0>, <&src0>, <&dvc0>;
|
|
capture = <&ssi1>, <&src1>, <&dvc1>;
|
|
};
|
|
};
|
|
|
|
rsnd_port1: port@1 {
|
|
reg = <1>;
|
|
rsnd_endpoint1: endpoint {
|
|
remote-endpoint = <&dw_hdmi0_snd_in>;
|
|
|
|
dai-format = "i2s";
|
|
bitclock-master = <&rsnd_endpoint1>;
|
|
frame-master = <&rsnd_endpoint1>;
|
|
|
|
playback = <&ssi2>;
|
|
};
|
|
};
|
|
|
|
#ifdef SOC_HAS_HDMI1
|
|
rsnd_port2: port@2 {
|
|
reg = <2>;
|
|
rsnd_endpoint2: endpoint {
|
|
remote-endpoint = <&dw_hdmi1_snd_in>;
|
|
|
|
dai-format = "i2s";
|
|
bitclock-master = <&rsnd_endpoint2>;
|
|
frame-master = <&rsnd_endpoint2>;
|
|
|
|
playback = <&ssi3>;
|
|
};
|
|
};
|
|
#endif /* SOC_HAS_HDMI1 */
|
|
};
|
|
};
|
|
|
|
&rpc {
|
|
/* Left disabled. To be enabled by firmware when unlocked. */
|
|
|
|
flash@0 {
|
|
compatible = "cypress,hyperflash", "cfi-flash";
|
|
reg = <0>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
bootparam@0 {
|
|
reg = <0x00000000 0x040000>;
|
|
read-only;
|
|
};
|
|
bl2@40000 {
|
|
reg = <0x00040000 0x140000>;
|
|
read-only;
|
|
};
|
|
cert_header_sa6@180000 {
|
|
reg = <0x00180000 0x040000>;
|
|
read-only;
|
|
};
|
|
bl31@1c0000 {
|
|
reg = <0x001c0000 0x040000>;
|
|
read-only;
|
|
};
|
|
tee@200000 {
|
|
reg = <0x00200000 0x440000>;
|
|
read-only;
|
|
};
|
|
uboot@640000 {
|
|
reg = <0x00640000 0x100000>;
|
|
read-only;
|
|
};
|
|
dtb@740000 {
|
|
reg = <0x00740000 0x080000>;
|
|
};
|
|
kernel@7c0000 {
|
|
reg = <0x007c0000 0x1400000>;
|
|
};
|
|
user@1bc0000 {
|
|
reg = <0x01bc0000 0x2440000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&rwdt {
|
|
timeout-sec = <60>;
|
|
status = "okay";
|
|
};
|
|
|
|
#ifdef SOC_HAS_SATA
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
#endif /* SOC_HAS_SATA */
|
|
|
|
&scif1 {
|
|
pinctrl-0 = <&scif1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
uart-has-rtscts;
|
|
/* Please only enable hscif1 or scif1 */
|
|
/* status = "okay"; */
|
|
};
|
|
|
|
&scif2 {
|
|
pinctrl-0 = <&scif2_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&scif_clk {
|
|
clock-frequency = <14745600>;
|
|
};
|
|
|
|
&sdhi0 {
|
|
pinctrl-0 = <&sdhi0_pins>;
|
|
pinctrl-1 = <&sdhi0_pins_uhs>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <&vcc_sdhi0>;
|
|
vqmmc-supply = <&vccq_sdhi0>;
|
|
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
|
|
bus-width = <4>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi2 {
|
|
/* used for on-board 8bit eMMC */
|
|
pinctrl-0 = <&sdhi2_pins>;
|
|
pinctrl-1 = <&sdhi2_pins>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_1p8v>;
|
|
bus-width = <8>;
|
|
mmc-hs200-1_8v;
|
|
mmc-hs400-1_8v;
|
|
no-sd;
|
|
no-sdio;
|
|
non-removable;
|
|
fixed-emmc-driver-type = <1>;
|
|
full-pwr-cycle-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi3 {
|
|
pinctrl-0 = <&sdhi3_pins>;
|
|
pinctrl-1 = <&sdhi3_pins_uhs>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <&vcc_sdhi3>;
|
|
vqmmc-supply = <&vccq_sdhi3>;
|
|
cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
|
|
bus-width = <4>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
shared-pin;
|
|
};
|
|
|
|
&usb_extal_clk {
|
|
clock-frequency = <50000000>;
|
|
};
|
|
|
|
&usb2_phy0 {
|
|
pinctrl-0 = <&usb0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
vbus-supply = <&vbus0_usb2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
pinctrl-0 = <&usb1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3_peri0 {
|
|
phys = <&usb3_phy0>;
|
|
phy-names = "usb";
|
|
|
|
companion = <&xhci0>;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3_phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3s0_clk {
|
|
clock-frequency = <100000000>;
|
|
};
|
|
|
|
&vin0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin4 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin5 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin6 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vin7 {
|
|
status = "okay";
|
|
};
|
|
|
|
&xhci0 {
|
|
pinctrl-0 = <&usb30_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
#ifdef SOC_HAS_USB2_CH2
|
|
&ehci2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pfc {
|
|
usb2_pins: usb2 {
|
|
groups = "usb2";
|
|
function = "usb2";
|
|
};
|
|
};
|
|
|
|
&usb2_phy2 {
|
|
pinctrl-0 = <&usb2_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
#endif /* SOC_HAS_USB2_CH2 */
|