mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
73feefdc1a
We defined PHYS_DRAM_1 to 0x80000000 (start of DRAM) and then used this for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1 in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and then using that name in code. Signed-off-by: Tom Rini <trini@ti.com>
305 lines
9 KiB
C
305 lines
9 KiB
C
/*
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* pcm051.h
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*
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* Phytec phyCORE-AM335x (pcm051) boards information header
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*
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* Copyright (C) 2013 Lemonage Software GmbH
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* Author Lars Poeschel <poeschel@lemonage.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __CONFIG_PCM051_H
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#define __CONFIG_PCM051_H
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#define CONFIG_AM33XX
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#define CONFIG_OMAP
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#define CONFIG_OMAP_COMMON
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#include <asm/arch/omap.h>
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "U-Boot# "
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#define CONFIG_SYS_NO_FLASH
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#define MACH_TYPE_PCM051 4144 /* Until the next sync */
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#define CONFIG_MACH_TYPE MACH_TYPE_PCM051
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_VERSION_VARIABLE
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/* set to negative value for no autoboot */
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_ENV_VARS_UBOOT_CONFIG
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x80007fc0\0" \
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"fdtaddr=0x80000000\0" \
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"rdaddr=0x81000000\0" \
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"bootfile=uImage\0" \
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"fdtfile=pcm051.dtb\0" \
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"console=ttyO0,115200n8\0" \
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"optargs=\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 ro\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
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"ramrootfstype=ext2\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"bootenv=uEnv.txt\0" \
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"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t $loadaddr $filesize\0" \
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"ramargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${ramroot} " \
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"rootfstype=${ramrootfstype}\0" \
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"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
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"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
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"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"ramboot=echo Booting from ramdisk ...; " \
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"run ramargs; " \
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"bootm ${loadaddr}\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"echo SD/MMC found on device ${mmcdev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loaduimage; then " \
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"run mmcboot;" \
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"fi;" \
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"fi;" \
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/* Clock Defines */
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#define V_OSCK 25000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK)
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#define CONFIG_CMD_ECHO
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/* max number of command args */
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#define CONFIG_SYS_MAXARGS 16
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 512
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+ sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* memtest works on 8 MB in DRAM after skipping 32MB from
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* start addr of ram disk
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*/
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (64 << 20))
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
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+ (8 * 1024 * 1024))
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#define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_CMD_MMC
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_SPI
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#define CONFIG_OMAP3_SPI
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#define CONFIG_MTD_DEVICE
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_WINBOND
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#define CONFIG_CMD_SF
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#define CONFIG_SF_DEFAULT_SPEED 24000000
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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GENERATED_GBL_DATA_SIZE)
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/* Platform/Board specific defs */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000 /* 1ms clock */
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#define CONFIG_CONS_INDEX 1
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (48000000)
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#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
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#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
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#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
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#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
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#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
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#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
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/* I2C Configuration */
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#define CONFIG_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_DRIVER_OMAP24XX_I2C
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#define CONFIG_CMD_EEPROM
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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#define CONFIG_OMAP_GPIO
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
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4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
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/* CPU */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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#define CONFIG_ENV_IS_NOWHERE
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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/*
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* Place the image at the start of the ROM defined image space.
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* We limit our size to the ROM-defined downloaded image area, and use the
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* rest of the space for stack.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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#define CONFIG_SPL_NET_SUPPORT
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#define CONFIG_SPL_ENV_SUPPORT
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#define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL"
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#define CONFIG_SPL_ETH_SUPPORT
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SPL_SPI_BUS 0
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#define CONFIG_SPL_SPI_CS 0
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
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#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80800000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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/* Since SPL did pll and ddr initialization for us,
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* we don't need to do it twice.
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*/
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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/*
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* USB configuration
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*/
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#define CONFIG_USB_MUSB_DSPS
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_MUSB_GADGET
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#define CONFIG_MUSB_PIO_ONLY
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_MUSB_HOST
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#define CONFIG_AM335X_USB0
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#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
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#define CONFIG_AM335X_USB1
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#define CONFIG_AM335X_USB1_MODE MUSB_HOST
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#ifdef CONFIG_MUSB_HOST
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#define CONFIG_CMD_USB
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#define CONFIG_USB_STORAGE
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#endif
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#ifdef CONFIG_MUSB_GADGET
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETH_RNDIS
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#endif /* CONFIG_MUSB_GADGET */
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/* Unsupported features */
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#undef CONFIG_USE_IRQ
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#define CONFIG_DRIVER_TI_CPSW
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_MULTI
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#define CONFIG_PHY_GIGE
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ADDR 0
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#define CONFIG_PHY_SMSC
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#endif /* ! __CONFIG_PCM051_H */
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