mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 09:30:10 +00:00
983e37007d
This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories. All refernces to the former locations are updated to
the current locations. For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.
Signed-off-by: Tom Rini <trini@konsulko.com>
104 lines
2.5 KiB
C
104 lines
2.5 KiB
C
/*
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* clk-synthesizer.c
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*
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* Clock synthesizer apis
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*
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* Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/clk_synthesizer.h>
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#include <i2c.h>
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/**
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* clk_synthesizer_reg_read - Read register from synthesizer.
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* @addr: addr within the i2c device
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* buf: Buffer to which value is to be read.
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*
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* For reading the register from this clock synthesizer, a command needs to
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* be send along with enabling byte read more, and then read can happen.
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* Returns 0 on success
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*/
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static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
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{
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int rc;
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/* Enable Bye read */
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addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
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/* Send the command byte */
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rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
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if (rc)
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printf("Failed to send command to clock synthesizer\n");
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/* Read the Data */
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return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
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}
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/**
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* clk_synthesizer_reg_write - Write a value to register in synthesizer.
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* @addr: addr within the i2c device
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* val: Value to be written in the addr.
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*
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* Enable the byte read mode in the address and start the i2c transfer.
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* Returns 0 on success
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*/
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static int clk_synthesizer_reg_write(int addr, uint8_t val)
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{
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uint8_t cmd[2];
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int rc = 0;
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/* Enable byte write */
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cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
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cmd[1] = val;
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rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
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if (rc)
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printf("Clock synthesizer reg write failed at addr = 0x%x\n",
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addr);
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return rc;
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}
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/**
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* setup_clock_syntherizer - Program the clock synthesizer to get the desired
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* frequency.
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* @data: Data containing the desired output
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*
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* This is a PLL-based high performance synthesizer which gives 3 outputs
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* as per the PLL_DIV and load capacitor programmed.
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*/
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int setup_clock_synthesizer(struct clk_synth *data)
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{
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int rc;
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uint8_t val;
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rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
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if (rc) {
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printf("i2c probe failed at address 0x%x\n",
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CLK_SYNTHESIZER_I2C_ADDR);
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return rc;
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}
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rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
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if (val != data->id)
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return rc;
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/* Crystal Load capacitor selection */
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
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if (rc)
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return rc;
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
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if (rc)
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return rc;
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
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if (rc)
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return rc;
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
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if (rc)
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return rc;
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return 0;
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}
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