u-boot/arch/riscv
Pragnesh Patel 7257455e7c riscv: fu540: dts: Correct reg size of clint node
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-10-26 10:01:37 +08:00
..
cpu timer: Add _TIMER suffix to Andes PLMT Kconfig 2020-10-26 10:01:28 +08:00
dts riscv: fu540: dts: Correct reg size of clint node 2020-10-26 10:01:37 +08:00
include/asm riscv: Use a valid bit to ignore already-pending IPIs 2020-09-30 08:54:52 +08:00
lib riscv: Move timer portions of SiFive CLINT to drivers/timer 2020-10-26 10:01:28 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: Move Andes PLMT driver to drivers/timer 2020-10-26 10:01:28 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00